conv depthwise 2D asymmetric input square kernel
4 eligible runs
conv
KernelBench level1 problem 84: conv depthwise 2D asymmetric input square kernel. The computation is the reference PyTorch module's forward pass; the output shape follows the module (mirrored as each implementation's source).
Fastest reported
9.83ms±0.04 · mean of 100 · 1.03× faster than baseline
torch.compile (inductor)PyTorch · MIT · python
Reported evidence · last observed 2026-03-05. Reported by source; not independently reproduced.
Current records
HardwareBest knownImplementationRuns
NVIDIA H100 · env 19.83 mstorch.compile (inductor)2NVIDIA H100 · env 213.3 msPyTorch eager2Not measured on B200 for this workload. Challenges →
Source-native comparison · GPU NVIDIA H100 · Workload width_in = 512 · height_in = 256 · batch_size = 64 · in_channels = 128 · fp32 · Protocol KernelBench timing scripts · mean · 2 results · last observed 2026-03-05Record history →
Estimated floor 1.28 ms · record 7.67× above itestimate, not evidence ›
DRAM 1.28 ms · bandwidth-bound on H100 SXM
every declared tensor crosses HBM exactly once (3,350 GB/s, H100 SXM datasheet)
no arithmetic formula for this family: bandwidth floor only
headroom-v1: a lower bound from declared tensors and datasheet peaks. A kernel can sit well above it for good reasons.
#
Implementation
Latency
vs #1
Trust
Observed
1torch.compile (inductor)PyTorch9.83ms±0.041.00×Reported · MIT · source2026-03-05stale
1.03× faster than the baseline. Measured exactly what you asked. Reported by source; not independently reproduced.
source mirroredMITno install recipeView source →Run detail →
210.1ms±0.011.03×Reported · MIT · source2026-03-05stale
Measured exactly what you asked. The source's designated baseline implementation. Reported by source; not independently reproduced.
source mirroredMITno install recipeView source →Run detail →
Implementations
Implementation
Runtime
Best latency
Evidence
Availability
Semantics
Inputs and outputs
xfp32 [batch_size, in_channels, height_in, width_in]
outfloat [out]
Axes and behavior
outvariable
width_invariable
height_invariable
batch_sizevariable
in_channelsvariable
determinismunspecified
constraintsNo mutation or aliasing
Identity
sha25679d01a7d0c4f…
Sources: KernelBench baseline timings (2026-03-05) · MITlast observed 2026-03-05How records are decidedJSON