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conv transposed 2D asymmetric input square kernel

4 eligible runs
conv

KernelBench level1 problem 71: conv transposed 2D asymmetric input square kernel. The computation is the reference PyTorch module's forward pass; the output shape follows the module (mirrored as each implementation's source).

Source baseline · unbeaten
1.58ms±0.00 · mean of 100
PyTorch eagerPyTorch · MIT · python

Reported evidence · last observed 2026-03-05. The source's designated baseline implementation. Reported by source; not independently reproduced.

Current records

Not measured on B200 for this workload. Challenges →

Source-native comparison · GPU NVIDIA H100 · Workload width_in = 1024 · height_in = 512 · batch_size = 8 · in_channels = 32 · fp32 · Protocol KernelBench timing scripts · mean · 2 results · last observed 2026-03-05Record history →
Estimated floor 160.3 µs · record 9.86× above itestimate, not evidence ›
DRAM 160.3 µs · bandwidth-bound on H100 SXM
every declared tensor crosses HBM exactly once (3,350 GB/s, H100 SXM datasheet)
no arithmetic formula for this family: bandwidth floor only
headroom-v1: a lower bound from declared tensors and datasheet peaks. A kernel can sit well above it for good reasons.
#
Implementation
Latency
vs #1
Trust
Observed
1
PyTorch eagerbaselinePyTorch
1.58ms±0.00
1.00×
Reported · MIT · source
2026-03-05stale

Measured exactly what you asked. The source's designated baseline implementation. Reported by source; not independently reproduced.

source mirroredMITno install recipeView source →Run detail →
2
1.60ms±0.00
1.01×
Reported · MIT · source
2026-03-05stale

1.01× slower than the baseline. Measured exactly what you asked. Reported by source; not independently reproduced.

source mirroredMITno install recipeView source →Run detail →

Implementations

Implementation
Runtime
Best latency
Evidence
Availability
python · torch_eager
1.58ms
1.00×
Reported
MIT · source
python · torch_compile_inductor
1.60ms
1.01×
Reported
MIT · source

Semantics

Inputs and outputs
xfp32 [batch_size, in_channels, height_in, width_in]
outfloat [out]
Axes and behavior
outvariable
width_invariable
height_invariable
batch_sizevariable
in_channelsvariable
determinismunspecified
constraintsNo mutation or aliasing
Identity
sha256c614197727aa…
Sources: KernelBench baseline timings (2026-03-05) · MITlast observed 2026-03-05How records are decidedJSON