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submission 66203

vinu1729 · python · License unknown

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Vendorable · source mirrored · license unknownView source →

No package. Vendor the mirrored source: 64 lines, June 9 Researcher Reciprocity License v1.0.

Runnnnnnnn.py
curl "https://kernelindex.com/api/v1/implementations/kernelbot-vectoradd-v2-66203?include=source"
interfacepython
Compatibility
measured onNVIDIA A100
declared hardwareNVIDIA A100
architecturessm_80
dtypesfp16

Benchmark evidence

1 measurement across 1 GPU, fastest first.

Operation / workload
Hardware
Latency
Rank
Observed
FP16 vector additionsuite of 5 cases
NVIDIA A100
1.01ms
#49 of 87
2025-10-17

Reported · How evidence levels are derived →

Source and license

sourceavailable
revision digestsha256:a4c6ac91567fa1b045f4b3f9780b7fdbb8741690a755b97c5613a29b4c1cf61b
license declaredunknown
license concludedunknown
authorsvinu1729
imported2026-08-15

Techniques

Extracted from the mirrored source by pattern, never inferred. Each row cites its line.

autotune@triton.autotune(
num-warps = 4triton.Config({'BLOCK_SIZE': 2048}, num_warps=4, num_stages=3),
stages = 3triton.Config({'BLOCK_SIZE': 2048}, num_warps=4, num_stages=3),

Kernel source

Runnnnnnnn.py64 lines
import torch
import triton
import triton.language as tl


@triton.autotune(
    configs=[
        # A100-specific configurations (64 threads per warp for NVIDIA)
        # A100 has 432 Tensor Cores optimized for these configs
        triton.Config({'BLOCK_SIZE': 2048}, num_warps=4, num_stages=3),
        triton.Config({'BLOCK_SIZE': 4096}, num_warps=4, num_stages=3),
        triton.Config({'BLOCK_SIZE': 4096}, num_warps=8, num_stages=3),
        triton.Config({'BLOCK_SIZE': 8192}, num_warps=8, num_stages=3),
        triton.Config({'BLOCK_SIZE': 8192}, num_warps=8, num_stages=4),
        triton.Config({'BLOCK_SIZE': 1024}, num_warps=4, num_stages=2),
        triton.Config({'BLOCK_SIZE': 2048}, num_warps=8, num_stages=2),
    ],
    key=['N'],
)
@triton.jit
def vectoradd_kernel(
    a_ptr,
    b_ptr,
    c_ptr,
    N,
    BLOCK_SIZE: tl.constexpr,
):
    """
    A100-optimized float16 vector addition.
    Tuned for 1935GB/s HBM2e memory bandwidth.
    """
    pid = tl.program_id(0)
    block_start = pid * BLOCK_SIZE
    offsets = block_start + tl.arange(0, BLOCK_SIZE)
    mask = offsets < N
    
    # Coalesced memory access for A100's 40MB L2 cache
    # evict_first works better on A100 for streaming workloads
    a = tl.load(a_ptr + offsets, mask=mask, eviction_policy='evict_first')
    b = tl.load(b_ptr + offsets, mask=mask, eviction_policy='evict_first')
    
    # FP16 addition - A100 Tensor Cores deliver 312 TFLOPS for FP16
    c = a + b
    
    # Streaming store - bypass L2 cache for write-only data
    tl.store(c_ptr + offsets, c, mask=mask)


def custom_kernel(data):
    """
    A100-optimized launcher.
    Maximizes 1935GB/s HBM2e bandwidth.
    """
    A, B, C = data
    
    N = A.numel()
    
    # Launch with optimal grid for A100's 108 SMs
    grid = lambda meta: (triton.cdiv(N, meta['BLOCK_SIZE']),)
    
    vectoradd_kernel[grid](A, B, C, N)
    
    return C
scrolls · 64 lines total

Source code from GPU Mode and the KernelBot dataset · June 9 Researcher Reciprocity License v1.0

Changes from previous submission

Against this author's previous submission submission 66199.

⋯ 4 unchanged lines
@triton.autotune(
configs=[
- triton.Config({'BLOCK_SIZE': 256}, num_warps=2, num_stages=2),
- triton.Config({'BLOCK_SIZE': 512}, num_warps=2, num_stages=2),
+ # A100-specific configurations (64 threads per warp for NVIDIA)
+ # A100 has 432 Tensor Cores optimized for these configs
+ triton.Config({'BLOCK_SIZE': 2048}, num_warps=4, num_stages=3),
+ triton.Config({'BLOCK_SIZE': 4096}, num_warps=4, num_stages=3),
+ triton.Config({'BLOCK_SIZE': 4096}, num_warps=8, num_stages=3),
+ triton.Config({'BLOCK_SIZE': 8192}, num_warps=8, num_stages=3),
+ triton.Config({'BLOCK_SIZE': 8192}, num_warps=8, num_stages=4),
triton.Config({'BLOCK_SIZE': 1024}, num_warps=4, num_stages=2),
- triton.Config({'BLOCK_SIZE': 2048}, num_warps=4, num_stages=2),
triton.Config({'BLOCK_SIZE': 2048}, num_warps=8, num_stages=2),
- triton.Config({'BLOCK_SIZE': 4096}, num_warps=8, num_stages=2),
- triton.Config({'BLOCK_SIZE': 4096}, num_warps=8, num_stages=3),
],
key=['N'],
)
⋯ 6 unchanged lines
BLOCK_SIZE: tl.constexpr,
):
"""
- Ultra-optimized float16 vector addition for B200.
- Uses autotuning for optimal configuration.
+ A100-optimized float16 vector addition.
+ Tuned for 1935GB/s HBM2e memory bandwidth.
"""
pid = tl.program_id(0)
block_start = pid * BLOCK_SIZE
offsets = block_start + tl.arange(0, BLOCK_SIZE)
mask = offsets < N
- # Load with cache eviction hints optimized for B200
- a = tl.load(a_ptr + offsets, mask=mask, other=0.0, eviction_policy='evict_last')
- b = tl.load(b_ptr + offsets, mask=mask, other=0.0, eviction_policy='evict_last')
+ # Coalesced memory access for A100's 40MB L2 cache
+ # evict_first works better on A100 for streaming workloads
+ a = tl.load(a_ptr + offsets, mask=mask, eviction_policy='evict_first')
+ b = tl.load(b_ptr + offsets, mask=mask, eviction_policy='evict_first')
- # Perform addition
+ # FP16 addition - A100 Tensor Cores deliver 312 TFLOPS for FP16
c = a + b
- # Store with write-back policy
- tl.store(c_ptr + offsets, c, mask=mask, eviction_policy='evict_last')
+ # Streaming store - bypass L2 cache for write-only data
+ tl.store(c_ptr + offsets, c, mask=mask)
def custom_kernel(data):
"""
- Main kernel with autotuning for peak B200 performance.
+ A100-optimized launcher.
+ Maximizes 1935GB/s HBM2e bandwidth.
"""
A, B, C = data
- # Ensure contiguous layout
- A = A.contiguous()
- B = B.contiguous()
- C = C.contiguous()
-
N = A.numel()
- # Grid configuration - will be optimized by autotune
+ # Launch with optimal grid for A100's 108 SMs
grid = lambda meta: (triton.cdiv(N, meta['BLOCK_SIZE']),)
- # Launch autotuned kernel
vectoradd_kernel[grid](A, B, C, N)
return C
scrolls · 76 diff lines total

Best evidence level for this revision: reported

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