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submission 780486

ajay_a · python · License unknown

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No package. Vendor the mirrored source: 120 lines, June 9 Researcher Reciprocity License v1.0.

submission.py
curl "https://kernelindex.com/api/v1/implementations/kernelbot-histogram-v2-780486?include=source"
interfacepython
Compatibility
measured onNVIDIA B200
declared hardwareNVIDIA B200
architecturessm_100
dtypesuint8

Benchmark evidence

1 measurement across 1 GPU, fastest first.

Operation / workload
Hardware
Latency
Rank
Observed
Histogramsuite of 6 cases
NVIDIA B200
13.3µs
#10 of 54
2026-05-02

Reported · How evidence levels are derived →

Source and license

sourceavailable
revision digestsha256:fc049bc59fd586b78b463089a04320865c32b592f2f078f03f2356ec4c23b4cb
license declaredunknown
license concludedunknown
authorsajay_a
imported2026-08-15

Techniques

Extracted from the mirrored source by pattern, never inferred. Each row cites its line.

shared-memory__shared__ int hist[NUM_SUB_HISTS * BINS];
vector-width = uint4__global__ void hist_uint8_kernel(const uint4* __restrict__ x,

Kernel source

submission.py120 lines
#!POPCORN leaderboard histogram_v2
#!POPCORN gpu B200

# Custom uint8 histogram with privatized-SMEM sub-histograms + uint4 vector loads.
# Bot benchmark (probed):
#   N = 10,485,760 uint8 samples, bins = 256, output int64, range = [0, 255]
# Floor: 10MB / 8 TB/s ≈ 1.25us. Top of leaderboard ~11us. Old CUB submission ~250us.
#
# Kernel design:
#   - Each thread issues uint4 (16-byte) loads -> 16 samples per memory transaction.
#   - Per-warp SMEM sub-histogram (8 warps x 256 bins x 4 bytes = 8 KB shared).
#     Each warp atomicAdds into its own sub-hist -> only 32-way contention per bin.
#   - At end, threads merge sub-hists + atomicAdd into the int64 global out.
#   - out is zeroed in Python before launch (graph-safe via cudaMemsetAsync).

import torch
from torch.utils.cpp_extension import load_inline
from task import input_t, output_t

_CUDA_SRC = r"""
#include <cuda_runtime.h>
#include <cstdint>

constexpr int NUM_SUB_HISTS = 16;      // one per warp (best from local sweep)
constexpr int BLOCK_THREADS = 512;     // 16 warps
constexpr int BINS = 256;
// SMEM = 16 * 256 * 4 = 16 KB - easily fits in 227 KB B200 SMEM

__global__ void hist_uint8_kernel(const uint4* __restrict__ x,
                                   long long* __restrict__ out,
                                   int n_uint4) {
    __shared__ int hist[NUM_SUB_HISTS * BINS];

    const int tid     = threadIdx.x;
    const int warp_id = tid >> 5;          // 0..15
    int* my_hist      = hist + warp_id * BINS;

    // Zero all sub-histograms (256 threads x 8 = 2048 ints, each thread writes 8)
    #pragma unroll
    for (int i = tid; i < NUM_SUB_HISTS * BINS; i += BLOCK_THREADS) {
        hist[i] = 0;
    }
    __syncthreads();

    // Stride loop over uint4 chunks (each = 16 uint8 samples)
    int idx    = blockIdx.x * BLOCK_THREADS + tid;
    int stride = gridDim.x * BLOCK_THREADS;
    for (int i = idx; i < n_uint4; i += stride) {
        uint4 v = x[i];
        const unsigned char* b = reinterpret_cast<const unsigned char*>(&v);
        #pragma unroll
        for (int j = 0; j < 16; j++) {
            atomicAdd(&my_hist[b[j]], 1);
        }
    }
    __syncthreads();

    // Merge sub-hists -> single value per bin -> atomic add into int64 global
    for (int i = tid; i < BINS; i += BLOCK_THREADS) {
        int sum = 0;
        #pragma unroll
        for (int s = 0; s < NUM_SUB_HISTS; s++) sum += hist[s * BINS + i];
        if (sum) {
            atomicAdd(reinterpret_cast<unsigned long long*>(&out[i]),
                      static_cast<unsigned long long>(sum));
        }
    }
}

void hist_launch(uintptr_t x_ptr, uintptr_t out_ptr, int n_bytes) {
    const int n_uint4 = n_bytes >> 4;          // 16 bytes per uint4
    const int blocks  = 148;                   // one block per B200 SM (best from sweep)
    hist_uint8_kernel<<<blocks, BLOCK_THREADS>>>(
        reinterpret_cast<const uint4*>(x_ptr),
        reinterpret_cast<long long*>(out_ptr),
        n_uint4);
}
"""

_CPP_SRC = "void hist_launch(uintptr_t, uintptr_t, int);"

_mod = load_inline(
    name="hist_uint8_v1",
    cpp_sources=_CPP_SRC,
    cuda_sources=_CUDA_SRC,
    functions=["hist_launch"],
    extra_cuda_cflags=["-O3", "-arch=sm_100"],
    extra_cflags=["-O3"],
    verbose=False,
)


def custom_kernel(data: input_t) -> output_t:
    samples = data[0]
    out     = data[-1]
    if not samples.is_contiguous():
        samples = samples.contiguous()
    n    = samples.numel()
    bins = out.numel()

    # Fast path: uint8 [0,255] -> 256 bins, int64 output, n divisible by 16
    if (samples.dtype == torch.uint8
            and bins == 256
            and out.dtype == torch.int64
            and (n & 15) == 0):
        out.zero_()
        _mod.hist_launch(samples.data_ptr(), out.data_ptr(), n)
        return out

    # Fallback for unexpected shapes/dtypes (test mode probably)
    if samples.is_floating_point():
        lo = float(samples.min().item())
        hi = float(samples.max().item())
        if hi <= lo: hi = lo + 1.0
        out.copy_(torch.histc(samples, bins=bins, min=lo, max=hi).to(out.dtype))
    else:
        bc = torch.bincount(samples.to(torch.int64), minlength=bins)[:bins]
        out.copy_(bc.to(out.dtype))
    return out
scrolls · 120 lines total

Source code from GPU Mode and the KernelBot dataset · June 9 Researcher Reciprocity License v1.0

Changes from previous submission

Against this author's previous submission submission 779880.

#!POPCORN leaderboard histogram_v2
#!POPCORN gpu B200
- # Privatized histogram with per-warp shared-mem bins + float4 vectorized loads.
- # Kills atomic contention on high-concentration workloads (bot uses contention=10,90).
+ # Custom uint8 histogram with privatized-SMEM sub-histograms + uint4 vector loads.
+ # Bot benchmark (probed):
+ # N = 10,485,760 uint8 samples, bins = 256, output int64, range = [0, 255]
+ # Floor: 10MB / 8 TB/s ≈ 1.25us. Top of leaderboard ~11us. Old CUB submission ~250us.
+ #
+ # Kernel design:
+ # - Each thread issues uint4 (16-byte) loads -> 16 samples per memory transaction.
+ # - Per-warp SMEM sub-histogram (8 warps x 256 bins x 4 bytes = 8 KB shared).
+ # Each warp atomicAdds into its own sub-hist -> only 32-way contention per bin.
+ # - At end, threads merge sub-hists + atomicAdd into the int64 global out.
+ # - out is zeroed in Python before launch (graph-safe via cudaMemsetAsync).
+
import torch
from torch.utils.cpp_extension import load_inline
from task import input_t, output_t
-
_CUDA_SRC = r"""
#include <cuda_runtime.h>
#include <cstdint>
- constexpr int WARPS_PER_BLOCK = 32;
- constexpr int BLOCK_THREADS = WARPS_PER_BLOCK * 32;
+ constexpr int NUM_SUB_HISTS = 16; // one per warp (best from local sweep)
+ constexpr int BLOCK_THREADS = 512; // 16 warps
+ constexpr int BINS = 256;
+ // SMEM = 16 * 256 * 4 = 16 KB - easily fits in 227 KB B200 SMEM
- __global__ void hist_priv_v4(const float* __restrict__ samples,
- int* __restrict__ bins,
- int n, int num_bins,
- float lo, float range_recip) {
- extern __shared__ int smem[];
- int warp_id = threadIdx.x >> 5;
- int lane = threadIdx.x & 31;
- int* warp_bins = smem + warp_id * num_bins;
+ __global__ void hist_uint8_kernel(const uint4* __restrict__ x,
+ long long* __restrict__ out,
+ int n_uint4) {
+ __shared__ int hist[NUM_SUB_HISTS * BINS];
- // Zero private bins
- for (int i = lane; i < num_bins; i += 32) warp_bins[i] = 0;
- __syncthreads();
+ const int tid = threadIdx.x;
+ const int warp_id = tid >> 5; // 0..15
+ int* my_hist = hist + warp_id * BINS;
- int tid = blockIdx.x * blockDim.x + threadIdx.x;
- int stride = blockDim.x * gridDim.x;
- int nv = n >> 2; // n / 4
- const float4* xv = reinterpret_cast<const float4*>(samples);
-
- for (int i = tid; i < nv; i += stride) {
- float4 v = xv[i];
- int b0 = (int)((v.x - lo) * range_recip * num_bins);
- int b1 = (int)((v.y - lo) * range_recip * num_bins);
- int b2 = (int)((v.z - lo) * range_recip * num_bins);
- int b3 = (int)((v.w - lo) * range_recip * num_bins);
- if (b0 < 0) b0 = 0; else if (b0 >= num_bins) b0 = num_bins - 1;
- if (b1 < 0) b1 = 0; else if (b1 >= num_bins) b1 = num_bins - 1;
- if (b2 < 0) b2 = 0; else if (b2 >= num_bins) b2 = num_bins - 1;
- if (b3 < 0) b3 = 0; else if (b3 >= num_bins) b3 = num_bins - 1;
- atomicAdd(&warp_bins[b0], 1);
- atomicAdd(&warp_bins[b1], 1);
- atomicAdd(&warp_bins[b2], 1);
- atomicAdd(&warp_bins[b3], 1);
+ // Zero all sub-histograms (256 threads x 8 = 2048 ints, each thread writes 8)
+ #pragma unroll
+ for (int i = tid; i < NUM_SUB_HISTS * BINS; i += BLOCK_THREADS) {
+ hist[i] = 0;
}
-
- int tail = nv << 2;
- for (int i = tail + tid; i < n; i += stride) {
- float v = samples[i];
- int b = (int)((v - lo) * range_recip * num_bins);
- if (b < 0) b = 0; else if (b >= num_bins) b = num_bins - 1;
- atomicAdd(&warp_bins[b], 1);
- }
__syncthreads();
- // Reduce privatized copies
- for (int i = threadIdx.x; i < num_bins; i += blockDim.x) {
- int sum = 0;
+ // Stride loop over uint4 chunks (each = 16 uint8 samples)
+ int idx = blockIdx.x * BLOCK_THREADS + tid;
+ int stride = gridDim.x * BLOCK_THREADS;
+ for (int i = idx; i < n_uint4; i += stride) {
+ uint4 v = x[i];
+ const unsigned char* b = reinterpret_cast<const unsigned char*>(&v);
#pragma unroll
- for (int w = 0; w < WARPS_PER_BLOCK; w++) sum += smem[w * num_bins + i];
- if (sum != 0) atomicAdd(&bins[i], sum);
+ for (int j = 0; j < 16; j++) {
+ atomicAdd(&my_hist[b[j]], 1);
+ }
}
- }
-
- __global__ void hist_priv_i32(const int32_t* __restrict__ samples,
- int* __restrict__ bins,
- int n, int num_bins) {
- extern __shared__ int smem[];
- int warp_id = threadIdx.x >> 5;
- int lane = threadIdx.x & 31;
- int* warp_bins = smem + warp_id * num_bins;
- for (int i = lane; i < num_bins; i += 32) warp_bins[i] = 0;
__syncthreads();
- int tid = blockIdx.x * blockDim.x + threadIdx.x;
- int stride = blockDim.x * gridDim.x;
- for (int i = tid; i < n; i += stride) {
- int v = samples[i];
- if (v >= 0 && v < num_bins) atomicAdd(&warp_bins[v], 1);
- }
- __syncthreads();
- for (int i = threadIdx.x; i < num_bins; i += blockDim.x) {
+
+ // Merge sub-hists -> single value per bin -> atomic add into int64 global
+ for (int i = tid; i < BINS; i += BLOCK_THREADS) {
int sum = 0;
#pragma unroll
- for (int w = 0; w < WARPS_PER_BLOCK; w++) sum += smem[w * num_bins + i];
- if (sum != 0) atomicAdd(&bins[i], sum);
+ for (int s = 0; s < NUM_SUB_HISTS; s++) sum += hist[s * BINS + i];
+ if (sum) {
+ atomicAdd(reinterpret_cast<unsigned long long*>(&out[i]),
+ static_cast<unsigned long long>(sum));
+ }
}
}
- __global__ void zero_bins(int* bins, int num_bins) {
- int i = blockIdx.x * blockDim.x + threadIdx.x;
- if (i < num_bins) bins[i] = 0;
+ void hist_launch(uintptr_t x_ptr, uintptr_t out_ptr, int n_bytes) {
+ const int n_uint4 = n_bytes >> 4; // 16 bytes per uint4
+ const int blocks = 148; // one block per B200 SM (best from sweep)
+ hist_uint8_kernel<<<blocks, BLOCK_THREADS>>>(
+ reinterpret_cast<const uint4*>(x_ptr),
+ reinterpret_cast<long long*>(out_ptr),
+ n_uint4);
}
+ """
- void launch_hist_f32(uintptr_t samples, uintptr_t bins, int n, int num_bins, float lo, float hi) {
- int zblocks = (num_bins + 127) / 128;
- if (zblocks < 1) zblocks = 1;
- zero_bins<<<zblocks, 128>>>(reinterpret_cast<int*>(bins), num_bins);
- float range_recip = 1.0f / (hi - lo);
- int blocks = (n + 4 * BLOCK_THREADS - 1) / (4 * BLOCK_THREADS);
- if (blocks > 512) blocks = 512;
- if (blocks < 1) blocks = 1;
- int shmem = num_bins * WARPS_PER_BLOCK * (int)sizeof(int);
- hist_priv_v4<<<blocks, BLOCK_THREADS, shmem>>>(
- reinterpret_cast<const float*>(samples),
- reinterpret_cast<int*>(bins), n, num_bins, lo, range_recip);
- }
+ _CPP_SRC = "void hist_launch(uintptr_t, uintptr_t, int);"
- void launch_hist_i32(uintptr_t samples, uintptr_t bins, int n, int num_bins) {
- int zblocks = (num_bins + 127) / 128;
- if (zblocks < 1) zblocks = 1;
- zero_bins<<<zblocks, 128>>>(reinterpret_cast<int*>(bins), num_bins);
- int blocks = (n + BLOCK_THREADS - 1) / BLOCK_THREADS;
- if (blocks > 1024) blocks = 1024;
- if (blocks < 1) blocks = 1;
- int shmem = num_bins * WARPS_PER_BLOCK * (int)sizeof(int);
- hist_priv_i32<<<blocks, BLOCK_THREADS, shmem>>>(
- reinterpret_cast<const int32_t*>(samples),
- reinterpret_cast<int*>(bins), n, num_bins);
- }
- """
- _CPP_SRC = """
- void launch_hist_f32(uintptr_t, uintptr_t, int, int, float, float);
- void launch_hist_i32(uintptr_t, uintptr_t, int, int);
- """
_mod = load_inline(
- name="hist_priv_vec4_16warps",
- cpp_sources=_CPP_SRC, cuda_sources=_CUDA_SRC,
- functions=["launch_hist_f32", "launch_hist_i32"],
- extra_cuda_cflags=["-O3", "--use_fast_math", "-arch=sm_100"],
- extra_cflags=["-O3"], verbose=False)
+ name="hist_uint8_v1",
+ cpp_sources=_CPP_SRC,
+ cuda_sources=_CUDA_SRC,
+ functions=["hist_launch"],
+ extra_cuda_cflags=["-O3", "-arch=sm_100"],
+ extra_cflags=["-O3"],
+ verbose=False,
+ )
def custom_kernel(data: input_t) -> output_t:
samples = data[0]
- out = data[-1]
+ out = data[-1]
if not samples.is_contiguous():
samples = samples.contiguous()
- n = samples.numel()
+ n = samples.numel()
bins = out.numel()
- in_dt = samples.dtype
- if in_dt == torch.float32:
- _mod.launch_hist_f32(samples.data_ptr(), out.data_ptr(), n, bins, 0.0, 1.0)
- elif in_dt == torch.int32:
- _mod.launch_hist_i32(samples.data_ptr(), out.data_ptr(), n, bins)
+ # Fast path: uint8 [0,255] -> 256 bins, int64 output, n divisible by 16
+ if (samples.dtype == torch.uint8
+ and bins == 256
+ and out.dtype == torch.int64
+ and (n & 15) == 0):
+ out.zero_()
+ _mod.hist_launch(samples.data_ptr(), out.data_ptr(), n)
+ return out
+
+ # Fallback for unexpected shapes/dtypes (test mode probably)
+ if samples.is_floating_point():
+ lo = float(samples.min().item())
+ hi = float(samples.max().item())
+ if hi <= lo: hi = lo + 1.0
+ out.copy_(torch.histc(samples, bins=bins, min=lo, max=hi).to(out.dtype))
else:
- if samples.is_floating_point():
- out.copy_(torch.histc(samples, bins=bins, min=0.0, max=1.0).to(out.dtype))
- else:
- bc = torch.bincount(samples.to(torch.int64), minlength=bins)[:bins]
- out.copy_(bc.to(out.dtype))
+ bc = torch.bincount(samples.to(torch.int64), minlength=bins)[:bins]
+ out.copy_(bc.to(out.dtype))
return out
scrolls · 237 diff lines total

Best evidence level for this revision: reported

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