submission 725712

"""
Optimized MXFP4 GEMM: fused quant+shuffle with shape-adaptive configs.

Hybrid config strategy:
  - M <= 32: BSM=np2(M) to minimize padding waste, NW=1, NS=1
  - M > 32:  BSM=32, NW=4, NS=2 (matching aiter's optimal for larger M)
  - All shapes with N <= 16384: BSN=128
Pre-allocates fp4 and shuffled scale buffers per shape.
"""
from __future__ import annotations

import torch
import triton
import triton.language as tl
import aiter
from aiter import dtypes
from task import input_t, output_t

_FP4 = dtypes.fp4x2
_E8M0 = dtypes.fp8_e8m0
_BF16 = dtypes.bf16

_cache: dict = {}


@triton.jit
def _mxfp4_quant_op(
    x,
    BLOCK_SIZE_N,
    BLOCK_SIZE_M,
    MXFP4_QUANT_BLOCK_SIZE,
):
    EXP_BIAS_FP32: tl.constexpr = 127
    EXP_BIAS_FP4: tl.constexpr = 1
    EBITS_F32: tl.constexpr = 8
    EBITS_FP4: tl.constexpr = 2
    MBITS_F32: tl.constexpr = 23
    MBITS_FP4: tl.constexpr = 1

    max_normal: tl.constexpr = 6
    min_normal: tl.constexpr = 1

    NUM_QUANT_BLOCKS: tl.constexpr = BLOCK_SIZE_N // MXFP4_QUANT_BLOCK_SIZE
    x = x.reshape(BLOCK_SIZE_M, NUM_QUANT_BLOCKS, MXFP4_QUANT_BLOCK_SIZE)
    amax = tl.max(tl.abs(x), axis=-1, keep_dims=True)
    amax = amax.to(tl.int32, bitcast=True)
    amax = (amax + 0x200000).to(tl.uint32, bitcast=True) & 0xFF800000
    amax = amax.to(tl.float32, bitcast=True)
    scale_e8m0_unbiased = tl.log2(amax).floor() - 2
    scale_e8m0_unbiased = tl.clamp(scale_e8m0_unbiased, min=-127, max=127)

    bs_e8m0 = scale_e8m0_unbiased.to(tl.uint8) + 127
    quant_scale = tl.exp2(-scale_e8m0_unbiased)
    qx = x * quant_scale

    qx = qx.to(tl.uint32, bitcast=True)
    s = qx & 0x80000000
    qx = qx ^ s

    qx_fp32 = qx.to(tl.float32, bitcast=True)
    saturate_mask = qx_fp32 >= max_normal
    denormal_mask = (not saturate_mask) & (qx_fp32 < min_normal)
    normal_mask = not (saturate_mask | denormal_mask)

    denorm_exp: tl.constexpr = (
        (EXP_BIAS_FP32 - EXP_BIAS_FP4) + (MBITS_F32 - MBITS_FP4) + 1
    )
    denorm_mask_int: tl.constexpr = denorm_exp << MBITS_F32
    denorm_mask_float: tl.constexpr = tl.cast(denorm_mask_int, tl.float32, bitcast=True)

    denormal_x = qx_fp32 + denorm_mask_float
    denormal_x = denormal_x.to(tl.uint32, bitcast=True)
    denormal_x -= denorm_mask_int
    denormal_x = denormal_x.to(tl.uint8)

    normal_x = qx
    mant_odd = (normal_x >> (MBITS_F32 - MBITS_FP4)) & 1
    val_to_add = ((EXP_BIAS_FP4 - EXP_BIAS_FP32) << MBITS_F32) + (1 << 21) - 1
    normal_x += val_to_add
    normal_x += mant_odd
    normal_x = normal_x >> (MBITS_F32 - MBITS_FP4)
    normal_x = normal_x.to(tl.uint8)

    e2m1_value = tl.full(qx.type.get_block_shapes(), 0x7, dtype=tl.uint8)
    e2m1_value = tl.where(normal_mask, normal_x, e2m1_value)
    e2m1_value = tl.where(denormal_mask, denormal_x, e2m1_value)
    sign_lp = s >> (MBITS_F32 + EBITS_F32 - MBITS_FP4 - EBITS_FP4)
    sign_lp = sign_lp.to(tl.uint8)
    e2m1_value = e2m1_value | sign_lp
    e2m1_value = tl.reshape(
        e2m1_value, [BLOCK_SIZE_M, NUM_QUANT_BLOCKS, MXFP4_QUANT_BLOCK_SIZE // 2, 2]
    )
    evens, odds = tl.split(e2m1_value)
    x_fp4 = evens | (odds << 4)
    x_fp4 = x_fp4.reshape(BLOCK_SIZE_M, BLOCK_SIZE_N // 2)

    return x_fp4, bs_e8m0.reshape(BLOCK_SIZE_M, NUM_QUANT_BLOCKS)


@triton.heuristics(
    {
        "EVEN_M_N": lambda args: args["M"] % args["BLOCK_SIZE_M"] == 0
        and args["N"] % (args["BLOCK_SIZE_N"] * args["NUM_ITER"]) == 0,
    }
)
@triton.jit
def _fused_quant_shuffle_k(
    x_ptr,
    x_fp4_ptr,
    bs_ptr,
    stride_x_m_in,
    stride_x_n_in,
    stride_x_fp4_m_in,
    stride_x_fp4_n_in,
    M,
    N,
    K_SCALE,
    SN,
    BLOCK_SIZE_M: tl.constexpr,
    BLOCK_SIZE_N: tl.constexpr,
    NUM_ITER: tl.constexpr,
    NUM_STAGES: tl.constexpr,
    MXFP4_QUANT_BLOCK_SIZE: tl.constexpr,
    EVEN_M_N: tl.constexpr,
    SCALING_MODE: tl.constexpr,
):
    pid_m = tl.program_id(0)
    start_n = tl.program_id(1) * NUM_ITER
    stride_x_m = tl.cast(stride_x_m_in, tl.int64)
    stride_x_n = tl.cast(stride_x_n_in, tl.int64)
    stride_x_fp4_m = tl.cast(stride_x_fp4_m_in, tl.int64)
    stride_x_fp4_n = tl.cast(stride_x_fp4_n_in, tl.int64)

    NUM_QUANT_BLOCKS: tl.constexpr = BLOCK_SIZE_N // MXFP4_QUANT_BLOCK_SIZE

    for pid_n in tl.range(start_n, min(start_n + NUM_ITER, N), num_stages=NUM_STAGES):
        x_offs_m = pid_m * BLOCK_SIZE_M + tl.arange(0, BLOCK_SIZE_M)
        x_offs_n = pid_n * BLOCK_SIZE_N + tl.arange(0, BLOCK_SIZE_N)
        x_offs = x_offs_m[:, None] * stride_x_m + x_offs_n[None, :] * stride_x_n

        if EVEN_M_N:
            x = tl.load(x_ptr + x_offs, cache_modifier=".cg").to(tl.float32)
        else:
            x_mask = (x_offs_m < M)[:, None] & (x_offs_n < N)[None, :]
            x = tl.load(x_ptr + x_offs, mask=x_mask, cache_modifier=".cg").to(
                tl.float32
            )

        out_tensor, bs_e8m0 = _mxfp4_quant_op(
            x, BLOCK_SIZE_N, BLOCK_SIZE_M, MXFP4_QUANT_BLOCK_SIZE
        )

        out_offs_m = pid_m * BLOCK_SIZE_M + tl.arange(0, BLOCK_SIZE_M)
        out_offs_n = pid_n * BLOCK_SIZE_N // 2 + tl.arange(0, BLOCK_SIZE_N // 2)
        out_offs = (
            out_offs_m[:, None] * stride_x_fp4_m + out_offs_n[None, :] * stride_x_fp4_n
        )

        if EVEN_M_N:
            tl.store(x_fp4_ptr + out_offs, out_tensor)
        else:
            out_mask = (out_offs_m < M)[:, None] & (out_offs_n < (N // 2))[None, :]
            tl.store(x_fp4_ptr + out_offs, out_tensor, mask=out_mask)

        bs_m = pid_m * BLOCK_SIZE_M + tl.arange(0, BLOCK_SIZE_M)
        bs_n = pid_n * NUM_QUANT_BLOCKS + tl.arange(0, NUM_QUANT_BLOCKS)

        sh_a = bs_m[:, None] // 32
        sh_b = (bs_m[:, None] % 32) // 16
        sh_c = bs_m[:, None] % 16
        sh_d = bs_n[None, :] // 8
        sh_e = (bs_n[None, :] % 8) // 4
        sh_f = bs_n[None, :] % 4

        shuf_offs = (
            sh_a * (32 * SN) + sh_d * 256 + sh_f * 64 + sh_c * 4 + sh_e * 2 + sh_b
        )

        if EVEN_M_N:
            tl.store(bs_ptr + shuf_offs, bs_e8m0)
        else:
            bs_mask = (bs_m < M)[:, None] & (
                bs_n < (N + MXFP4_QUANT_BLOCK_SIZE - 1) // MXFP4_QUANT_BLOCK_SIZE
            )[None, :]
            tl.store(bs_ptr + shuf_offs, bs_e8m0, mask=bs_mask)


def _np2(n):
    n -= 1
    n |= n >> 1
    n |= n >> 2
    n |= n >> 4
    n |= n >> 8
    n |= n >> 16
    return n + 1


def _build_entry(M, N, device):
    fp4_buf = torch.empty((M, N // 2), dtype=torch.uint8, device=device)
    ks = (N + 31) // 32
    sm = (M + 255) // 256 * 256
    sn = (ks + 7) // 8 * 8
    bs_buf = torch.zeros(sm, sn, dtype=torch.uint8, device=device)

    if N <= 1024:
        BSN = max(32, min(256, _np2(N)))
        BSM = min(8, _np2(M))
        NI, NW, NS = 1, 4, 1
    elif M <= 32:
        BSM = _np2(M)
        BSN = 128
        NI, NW, NS = 1, 1, 1
    elif N <= 16384:
        BSM, BSN = 32, 128
        NI, NW, NS = 1, 4, 2
    else:
        BSM, BSN = 64, 64
        NI, NW, NS = 4, 4, 2

    grid = (triton.cdiv(M, BSM), triton.cdiv(N, BSN * NI))
    return fp4_buf, bs_buf, grid, ks, sn, BSM, BSN, NI, NS, NW


@torch.inference_mode()
def custom_kernel(data: input_t) -> output_t:
    a = data[0]
    if not a.is_contiguous():
        a = a.contiguous()

    M, N = a.shape
    entry = _cache.get((M, N))
    if entry is None:
        entry = _build_entry(M, N, a.device)
        _cache[(M, N)] = entry

    fp4_buf, bs_buf, grid, ks, sn, BSM, BSN, NI, NS, NW = entry

    _fused_quant_shuffle_k[grid](
        a, fp4_buf, bs_buf,
        a.stride(0), a.stride(1),
        fp4_buf.stride(0), fp4_buf.stride(1),
        M, N, ks, sn,
        BLOCK_SIZE_M=BSM, BLOCK_SIZE_N=BSN,
        NUM_ITER=NI, NUM_STAGES=NS,
        MXFP4_QUANT_BLOCK_SIZE=32,
        SCALING_MODE=0,
        num_warps=NW,
    )

    return aiter.gemm_a4w4(
        fp4_buf.view(_FP4), data[3],
        bs_buf.view(_E8M0), data[4],
        dtype=_BF16, bpreshuffle=True,
    )