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submission 694763

Leandro Timberini · python · License unknown

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Vendorable · source mirrored · license unknownView source →

No package. Vendor the mirrored source: 2014 lines, June 9 Researcher Reciprocity License v1.0.

submission.py
curl "https://kernelindex.com/api/v1/implementations/kernelbot-amd-mxfp4-mm-694763?include=source"
interfacepython
Compatibility
measured onAMD Instinct MI355X
declared hardwareAMD Instinct MI355X
architecturesgfx950
dtypesbf16, mxfp4

Benchmark evidence

1 measurement across 1 GPU, fastest first.

Operation / workload
Hardware
Latency
Rank
Observed
AMD MXFP4 GEMMsuite of 6 cases
AMD Instinct MI355X
11.7µs
#345 of 1143
2026-04-02

Reported · How evidence levels are derived →

Source and license

sourceavailable
revision digestsha256:3179c5ef9dce2971027bd839fe2cd5c3c87f48b5f5326e06589d91474dc8abf9
license declaredunknown
license concludedunknown
authorsLeandro Timberini
imported2026-08-26

Techniques

Extracted from the mirrored source by pattern, never inferred. Each row cites its line.

fp4MXFP4 submission for MI355X.
num-warps = 1num_warps = 1
split-k_SPLITK_ATOMIC_ROUTES = {}
stages = 1num_stages=1,

Kernel source

submission.py2014 lines
#!POPCORN leaderboard amd-mxfp4-mm
#!POPCORN gpu MI355X

"""
MXFP4 submission for MI355X.

Author: Leandro Emanuel Timberini

Design:
- cache A quantization across repeated calls with the same input tensor
- use direct Triton routes where they outperform the generic path
- use direct AITER ASM routes for the remaining benchmark shapes
- keep A quantization aligned with dynamic_mxfp4_quant
- only compute the A scale shuffle on the ASM path
"""

import json
import os
from contextlib import contextmanager

import aiter
import torch
import torch._C
import triton
import triton.language as tl

def _fast_set_device(device):
    # Directly calling the C++ binding is faster than the Python wrapper
    torch._C._cuda_setDevice(device.index)

from aiter import dtypes
from aiter.ops.triton.quant import dynamic_mxfp4_quant
from task import input_t, output_t
try:
    from aiter.ops.triton._triton_kernels.quant.quant import (
        _dynamic_mxfp4_quant_kernel,
        _mxfp4_quant_op,
    )
except Exception:
    _dynamic_mxfp4_quant_kernel = None
    _mxfp4_quant_op = None

try:
    from aiter.ops.triton._triton_kernels.gemm.basic.gemm_a16wfp4 import (
        _gemm_a16wfp4_kernel as _OFFICIAL_A16_KERNEL,
        _gemm_a16wfp4_preshuffle_kernel as _FUSED_PRESHUFFLE_KERNEL,
    )
except Exception:
    _OFFICIAL_A16_KERNEL = None
    _FUSED_PRESHUFFLE_KERNEL = None

try:
    from aiter.ops.triton.gemm.basic.gemm_a16wfp4 import (
        gemm_a16wfp4 as _OFFICIAL_GEMM_A16WFP4,
    )
except Exception:
    _OFFICIAL_GEMM_A16WFP4 = None

try:
    from aiter.jit.module_gemm_common import get_padded_m as _GET_PADDED_M
except Exception:
    from aiter.ops.gemm_op_common import get_padded_m as _GET_PADDED_M

try:
    from aiter.jit.module_gemm_a4w4_asm import gemm_a4w4_asm as _GEMM_ASM
except Exception:
    from aiter.ops.gemm_op_a4w4 import gemm_a4w4_asm as _GEMM_ASM

_BF16 = torch.bfloat16
_F32 = torch.float32
_U8 = torch.uint8
_FP4X2 = dtypes.fp4x2
_FP8_E8M0 = dtypes.fp8_e8m0
_PROFILE_TAGS = os.getenv("SUBMISSION_PROFILE_TAGS", "0") == "1"
_STAGE_TIMINGS = os.getenv("SUBMISSION_STAGE_TIMINGS", "0") == "1"
_STAGE_TIMINGS_LIMIT = int(os.getenv("SUBMISSION_STAGE_TIMINGS_LIMIT", "32"))
_ENABLE_PROFILE_CONTEXT = _PROFILE_TAGS or _STAGE_TIMINGS
_ENABLE_OFFICIAL_A16_ROUTE = os.getenv("SUBMISSION_ENABLE_OFFICIAL_A16_ROUTE", "0") == "1"

_K32 = "_ZN5aiter41f4gemm_bf16_per1x32Fp4_BpreShuffle_32x128E"
_K64 = "_ZN5aiter41f4gemm_bf16_per1x32Fp4_BpreShuffle_64x128E"

# Direct ASM routing for benchmark and correctness-only shapes.
_ASM_MAP = {
    (4, 2880, 512): _K32,
    (64, 7168, 2048): _K32,
    (256, 3072, 1536): _K32,
    (256, 2880, 512): _K64,
}

# Split-K routes that bypass the generic wrapper path.
_TRITON_ROUTES = {
    (16, 2112, 7168): (16, 64, 512, 14),
    (32, 4096, 512): (32, 64, 512, 1),
    (32, 2880, 512): (32, 64, 512, 1),
}

# Keep the fused preshuffle route only where it is a measured win.
_FUSED_PRESHUFFLE_ROUTES = {
    (64, 7168, 2048): {
        "BLOCK_SIZE_M": 16,
        "BLOCK_SIZE_N": 128,
        "BLOCK_SIZE_K": 512,
        "GROUP_SIZE_M": 1,
        "NUM_KSPLIT": 1,
        "num_warps": 8,
        "num_stages": 2,
        "waves_per_eu": 4,
        "matrix_instr_nonkdim": 16,
        "cache_modifier": ".cg",
    },
    (16, 2112, 7168): {
        "BLOCK_SIZE_M": 16,
        "BLOCK_SIZE_N": 128,
        "BLOCK_SIZE_K": 512,
        "GROUP_SIZE_M": 1,
        "NUM_KSPLIT": 14,
        "num_warps": 4,
        "num_stages": 1,
        "waves_per_eu": 1,
        "matrix_instr_nonkdim": 16,
        "cache_modifier": ".cg",
    },
}

# Padding is opt-in and allowlisted. Leave empty unless a shape has been
# measured against the safe ASM kernel family.
_ASM_PAD_GL_OVERRIDES = {}
_ASM_PAD_SAFE_SHAPES = set()

_ASM_KERNEL_OVERRIDES = {}

# Reduce quant launch count on the small Mx512 fast paths.
_QUANT_CONFIG_OVERRIDES = {
    (4, 512): (4, 512, 1, 1, 4),
    (32, 512): (16, 256, 1, 1, 4),
    (256, 1536): (64, 256, 1, 1, 8),
}

_FUSED_A16_DIRECT_ROUTES = {
    (4, 2880, 512): (4, 64, 512, 4, 1),
    (32, 4096, 512): (32, 64, 512, 8, 1),
    (32, 2880, 512): (32, 64, 512, 8, 1),
}

_A16_PRESHUFFLE_ATOMIC_ROUTES = {}

_A16_DIRECT_ATOMIC_ROUTES = {}

_OFFICIAL_A16_ROUTES = {}

_TRITON_LAUNCH_OVERRIDES = {
    (16, 2112, 7168): (4, 1, 4, 1),
}

_SPLITK_ATOMIC_ROUTES = {}
_FUSED_PRESHUFFLE_REDUCE_OVERRIDES = {
    (16, 2112, 7168): (16, 64),
}
_FUSED_PRESHUFFLE_PARTIAL_OVERRIDES = {}

_SPLITK_PARTIAL_OVERRIDES = {}


# Store A scales directly in ASM layout so the ASM path skips a separate shuffle.
@triton.heuristics(
    {
        "EVEN_M_N": lambda args: args["M"] % args["BLOCK_SIZE_M"] == 0
        and args["N"] % (args["BLOCK_SIZE_N"] * args["NUM_ITER"]) == 0,
    }
)
@triton.jit
def _dynamic_mxfp4_quant_kernel_shuffled(
    x_ptr,
    x_fp4_ptr,
    bs_shuf_ptr,
    stride_x_m_in,
    stride_x_n_in,
    stride_x_fp4_m_in,
    stride_x_fp4_n_in,
    stride_bs_shuf_m_in,
    stride_bs_shuf_n_in,
    M,
    N,
    BS_SN,
    SCALE_COLS_VALID,
    BLOCK_SIZE_M: tl.constexpr,
    BLOCK_SIZE_N: tl.constexpr,
    NUM_ITER: tl.constexpr,
    NUM_STAGES: tl.constexpr,
    MXFP4_QUANT_BLOCK_SIZE: tl.constexpr,
    EVEN_M_N: tl.constexpr,
):
    pid_m = tl.program_id(0)
    start_n = tl.program_id(1) * NUM_ITER
    stride_x_m = tl.cast(stride_x_m_in, tl.int64)
    stride_x_n = tl.cast(stride_x_n_in, tl.int64)
    stride_x_fp4_m = tl.cast(stride_x_fp4_m_in, tl.int64)
    stride_x_fp4_n = tl.cast(stride_x_fp4_n_in, tl.int64)
    stride_bs_shuf_m = tl.cast(stride_bs_shuf_m_in, tl.int64)
    stride_bs_shuf_n = tl.cast(stride_bs_shuf_n_in, tl.int64)

    NUM_QUANT_BLOCKS: tl.constexpr = BLOCK_SIZE_N // MXFP4_QUANT_BLOCK_SIZE

    for pid_n in tl.range(start_n, min(start_n + NUM_ITER, N), num_stages=NUM_STAGES):
        x_offs_m = pid_m * BLOCK_SIZE_M + tl.arange(0, BLOCK_SIZE_M)
        x_offs_n = pid_n * BLOCK_SIZE_N + tl.arange(0, BLOCK_SIZE_N)
        x_offs = x_offs_m[:, None] * stride_x_m + x_offs_n[None, :] * stride_x_n

        if EVEN_M_N:
            x = tl.load(x_ptr + x_offs, cache_modifier=".cg").to(tl.float32)
        else:
            x_mask = (x_offs_m[:, None] < M) & (x_offs_n[None, :] < N)
            x = tl.load(x_ptr + x_offs, mask=x_mask, cache_modifier=".cg").to(tl.float32)

        out_tensor, bs_e8m0 = _mxfp4_quant_op(
            x, BLOCK_SIZE_N, BLOCK_SIZE_M, MXFP4_QUANT_BLOCK_SIZE
        )

        out_offs_m = pid_m * BLOCK_SIZE_M + tl.arange(0, BLOCK_SIZE_M)
        out_offs_n = pid_n * BLOCK_SIZE_N // 2 + tl.arange(0, BLOCK_SIZE_N // 2)
        out_offs = (
            out_offs_m[:, None] * stride_x_fp4_m + out_offs_n[None, :] * stride_x_fp4_n
        )

        if EVEN_M_N:
            tl.store(x_fp4_ptr + out_offs, out_tensor)
        else:
            out_mask = (out_offs_m[:, None] < M) & (out_offs_n[None, :] < (N // 2))
            tl.store(x_fp4_ptr + out_offs, out_tensor, mask=out_mask)

        scale_offs_m = pid_m * BLOCK_SIZE_M + tl.arange(0, BLOCK_SIZE_M)
        scale_offs_n = pid_n * NUM_QUANT_BLOCKS + tl.arange(0, NUM_QUANT_BLOCKS)

        group_row = scale_offs_m[:, None] // 32
        rem_row_1 = (scale_offs_m[:, None] % 32) // 16
        rem_row_2 = scale_offs_m[:, None] % 16
        group_col = scale_offs_n[None, :] // 8
        rem_col_1 = (scale_offs_n[None, :] % 8) // 4
        rem_col_2 = scale_offs_n[None, :] % 4
        packed_idx = (
            (((((group_row * (BS_SN // 8) + group_col) * 4 + rem_col_2) * 16 + rem_row_2) * 2 + rem_col_1) * 2)
            + rem_row_1
        )
        bs_shuf_offs = (
            (packed_idx // BS_SN) * stride_bs_shuf_m
            + (packed_idx % BS_SN) * stride_bs_shuf_n
        )
        bs_mask = (scale_offs_m[:, None] < M) & (scale_offs_n[None, :] < SCALE_COLS_VALID)
        tl.store(bs_shuf_ptr + bs_shuf_offs, bs_e8m0, mask=bs_mask)

@triton.jit
def _splitk_write(
    a_ptr,
    b_ptr,
    pp_ptr,
    as_ptr,
    bss_ptr,
    M,
    N,
    K,
    BS_SN,
    s_am,
    s_ak,
    s_bn,
    s_bk,
    s_ppk,
    s_ppm,
    s_ppn,
    s_asm,
    s_ask,
    s_bssm,
    s_bssn,
    SK_BLOCK,
    PP_TO_BF16: tl.constexpr,
    BLOCK_M: tl.constexpr,
    BLOCK_N: tl.constexpr,
    BLOCK_K: tl.constexpr,
    SPLIT_K: tl.constexpr,
):
    pid_sk = tl.program_id(0) % SPLIT_K
    pid = tl.program_id(0) // SPLIT_K
    num_pid_n = tl.cdiv(N, BLOCK_N)
    pid_m = pid // num_pid_n
    pid_n = pid % num_pid_n

    k0_sk = pid_sk * SK_BLOCK
    scale_cols_per_row = BS_SN // 8

    offs_m = pid_m * BLOCK_M + tl.arange(0, BLOCK_M)
    offs_n = pid_n * BLOCK_N + tl.arange(0, BLOCK_N)
    acc = tl.zeros((BLOCK_M, BLOCK_N), dtype=tl.float32)

    for step in range(0, tl.cdiv(SK_BLOCK, BLOCK_K)):
        k0 = k0_sk + step * BLOCK_K
        if k0 < K:
            offs_k_packed = (k0 // 2) + tl.arange(0, BLOCK_K // 2)
            offs_k_scale = (k0 // 32) + tl.arange(0, BLOCK_K // 32)

            a = tl.load(
                a_ptr + offs_m[:, None] * s_am + offs_k_packed[None, :] * s_ak,
                mask=(offs_m[:, None] < M) & (offs_k_packed[None, :] < (K // 2)),
                other=0,
            )
            a_scales = tl.load(
                as_ptr + offs_m[:, None] * s_asm + offs_k_scale[None, :] * s_ask,
                mask=(offs_m[:, None] < M) & (offs_k_scale[None, :] < (K // 32)),
                other=0,
            )
            b = tl.load(
                b_ptr + offs_n[:, None] * s_bn + offs_k_packed[None, :] * s_bk,
                mask=(offs_n[:, None] < N) & (offs_k_packed[None, :] < (K // 2)),
                other=0,
            )

            row = offs_n[:, None]
            col = offs_k_scale[None, :]
            group_row = row // 32
            rem_row_1 = (row % 32) // 16
            rem_row_2 = row % 16
            group_col = col // 8
            rem_col_1 = (col % 8) // 4
            rem_col_2 = col % 4
            packed_idx = (
                (((((group_row * scale_cols_per_row + group_col) * 4 + rem_col_2) * 16 + rem_row_2) * 2 + rem_col_1) * 2)
                + rem_row_1
            )
            b_scales = tl.load(
                bss_ptr
                + (packed_idx // BS_SN) * s_bssm
                + (packed_idx % BS_SN) * s_bssn,
                mask=(offs_n[:, None] < N) & (offs_k_scale[None, :] < (K // 32)),
                other=0,
            )

            acc = tl.dot_scaled(a, a_scales, "e2m1", tl.trans(b), b_scales, "e2m1", acc)

    out = acc.to(tl.bfloat16) if PP_TO_BF16 else acc
    tl.store(
        pp_ptr + pid_sk * s_ppk + offs_m[:, None] * s_ppm + offs_n[None, :] * s_ppn,
        out,
        mask=(offs_m[:, None] < M) & (offs_n[None, :] < N),
    )


@triton.jit
def _splitk_reduce(
    pp_ptr,
    c_ptr,
    M,
    N,
    s_ppk,
    s_ppm,
    s_ppn,
    s_cm,
    s_cn,
    BLOCK_M: tl.constexpr,
    BLOCK_N: tl.constexpr,
    SPLIT_K: tl.constexpr,
):
    pid_m = tl.program_id(0)
    pid_n = tl.program_id(1)
    offs_m = pid_m * BLOCK_M + tl.arange(0, BLOCK_M)
    offs_n = pid_n * BLOCK_N + tl.arange(0, BLOCK_N)
    mask = (offs_m[:, None] < M) & (offs_n[None, :] < N)
    acc = tl.zeros((BLOCK_M, BLOCK_N), dtype=tl.float32)

    for pid_k in range(0, SPLIT_K):
        acc += tl.load(
            pp_ptr + pid_k * s_ppk + offs_m[:, None] * s_ppm + offs_n[None, :] * s_ppn,
            mask=mask,
            other=0,
        )
    tl.store(c_ptr + offs_m[:, None] * s_cm + offs_n[None, :] * s_cn, acc.to(tl.bfloat16), mask=mask)


@triton.jit
def _splitk_atomic_write(
    a_ptr,
    b_ptr,
    c_ptr,
    as_ptr,
    bss_ptr,
    M,
    N,
    K,
    BS_SN,
    s_am,
    s_ak,
    s_bn,
    s_bk,
    s_cm,
    s_cn,
    s_asm,
    s_ask,
    s_bssm,
    s_bssn,
    SK_BLOCK,
    BLOCK_M: tl.constexpr,
    BLOCK_N: tl.constexpr,
    BLOCK_K: tl.constexpr,
    SPLIT_K: tl.constexpr,
):
    pid_sk = tl.program_id(0) % SPLIT_K
    pid = tl.program_id(0) // SPLIT_K
    num_pid_n = tl.cdiv(N, BLOCK_N)
    pid_m = pid // num_pid_n
    pid_n = pid % num_pid_n

    k0_sk = pid_sk * SK_BLOCK
    scale_cols_per_row = BS_SN // 8

    offs_m = pid_m * BLOCK_M + tl.arange(0, BLOCK_M)
    offs_n = pid_n * BLOCK_N + tl.arange(0, BLOCK_N)
    acc = tl.zeros((BLOCK_M, BLOCK_N), dtype=tl.float32)

    for step in range(0, tl.cdiv(SK_BLOCK, BLOCK_K)):
        k0 = k0_sk + step * BLOCK_K
        if k0 < K:
            offs_k_packed = (k0 // 2) + tl.arange(0, BLOCK_K // 2)
            offs_k_scale = (k0 // 32) + tl.arange(0, BLOCK_K // 32)

            a = tl.load(
                a_ptr + offs_m[:, None] * s_am + offs_k_packed[None, :] * s_ak,
                mask=(offs_m[:, None] < M) & (offs_k_packed[None, :] < (K // 2)),
                other=0,
            )
            a_scales = tl.load(
                as_ptr + offs_m[:, None] * s_asm + offs_k_scale[None, :] * s_ask,
                mask=(offs_m[:, None] < M) & (offs_k_scale[None, :] < (K // 32)),
                other=0,
            )
            b = tl.load(
                b_ptr + offs_n[:, None] * s_bn + offs_k_packed[None, :] * s_bk,
                mask=(offs_n[:, None] < N) & (offs_k_packed[None, :] < (K // 2)),
                other=0,
            )

            row = offs_n[:, None]
            col = offs_k_scale[None, :]
            group_row = row // 32
            rem_row_1 = (row % 32) // 16
            rem_row_2 = row % 16
            group_col = col // 8
            rem_col_1 = (col % 8) // 4
            rem_col_2 = col % 4
            packed_idx = (
                (((((group_row * scale_cols_per_row + group_col) * 4 + rem_col_2) * 16 + rem_row_2) * 2 + rem_col_1) * 2)
                + rem_row_1
            )
            b_scales = tl.load(
                bss_ptr
                + (packed_idx // BS_SN) * s_bssm
                + (packed_idx % BS_SN) * s_bssn,
                mask=(offs_n[:, None] < N) & (offs_k_scale[None, :] < (K // 32)),
                other=0,
            )

            acc = tl.dot_scaled(a, a_scales, "e2m1", tl.trans(b), b_scales, "e2m1", acc)

    tl.atomic_add(
        c_ptr + offs_m[:, None] * s_cm + offs_n[None, :] * s_cn,
        acc,
        mask=(offs_m[:, None] < M) & (offs_n[None, :] < N),
        sem="relaxed",
    )


@triton.heuristics(
    {
        "EVEN_K": lambda args: (args["K"] % (args["BLOCK_SIZE_K"] // 2) == 0)
        and (args["SPLITK_BLOCK_SIZE"] % args["BLOCK_SIZE_K"] == 0)
        and (args["K"] % (args["SPLITK_BLOCK_SIZE"] // 2) == 0),
    }
)
@triton.jit
def _a16_preshuffle_atomic_write(
    a_ptr,
    b_ptr,
    c_ptr,
    b_scales_ptr,
    M,
    N,
    K,
    stride_am,
    stride_ak,
    stride_bn,
    stride_bk,
    stride_cm,
    stride_cn,
    stride_bsn,
    stride_bsk,
    BLOCK_SIZE_M: tl.constexpr,
    BLOCK_SIZE_N: tl.constexpr,
    BLOCK_SIZE_K: tl.constexpr,
    GROUP_SIZE_M: tl.constexpr,
    NUM_KSPLIT: tl.constexpr,
    SPLITK_BLOCK_SIZE: tl.constexpr,
    EVEN_K: tl.constexpr,
    num_warps: tl.constexpr,
    num_stages: tl.constexpr,
    waves_per_eu: tl.constexpr,
    matrix_instr_nonkdim: tl.constexpr,
    cache_modifier: tl.constexpr,
):
    pid_unified = tl.program_id(axis=0)
    pid_k = pid_unified % NUM_KSPLIT
    pid = pid_unified // NUM_KSPLIT
    num_pid_m = tl.cdiv(M, BLOCK_SIZE_M)
    num_pid_n = tl.cdiv(N, BLOCK_SIZE_N)

    if NUM_KSPLIT == 1:
        pid_m = pid // num_pid_n
        pid_n = pid % num_pid_n
    else:
        pid_m = pid // num_pid_n
        pid_n = pid % num_pid_n

    SCALE_GROUP_SIZE: tl.constexpr = 32

    if (pid_k * SPLITK_BLOCK_SIZE // 2) < K:
        num_k_iter = tl.cdiv(SPLITK_BLOCK_SIZE // 2, BLOCK_SIZE_K // 2)

        offs_k_bf16 = tl.arange(0, BLOCK_SIZE_K)
        offs_k_split_bf16 = pid_k * SPLITK_BLOCK_SIZE + offs_k_bf16
        offs_am = (pid_m * BLOCK_SIZE_M + tl.arange(0, BLOCK_SIZE_M)) % M
        a_ptrs = a_ptr + (
            offs_am[:, None] * stride_am + offs_k_split_bf16[None, :] * stride_ak
        )

        offs_k_shuffle_arr = tl.arange(0, (BLOCK_SIZE_K // 2) * 16)
        offs_k_shuffle = pid_k * (SPLITK_BLOCK_SIZE // 2) * 16 + offs_k_shuffle_arr
        offs_bn = (pid_n * (BLOCK_SIZE_N // 16) + tl.arange(0, BLOCK_SIZE_N // 16)) % N
        b_ptrs = b_ptr + (
            offs_bn[:, None] * stride_bn + offs_k_shuffle[None, :] * stride_bk
        )

        offs_bsn = (
            pid_n * (BLOCK_SIZE_N // 32) + tl.arange(0, (BLOCK_SIZE_N // 32))
        ) % N
        offs_ks = (pid_k * (SPLITK_BLOCK_SIZE // SCALE_GROUP_SIZE) * 32) + tl.arange(
            0, BLOCK_SIZE_K // SCALE_GROUP_SIZE * 32
        )
        b_scale_ptrs = (
            b_scales_ptr
            + offs_bsn[:, None] * stride_bsn
            + offs_ks[None, :] * stride_bsk
        )

        accumulator = tl.zeros((BLOCK_SIZE_M, BLOCK_SIZE_N), dtype=tl.float32)

        for k_iter in range(pid_k * num_k_iter, (pid_k + 1) * num_k_iter):
            b_scales = (
                tl.load(b_scale_ptrs, cache_modifier=cache_modifier)
                .reshape(
                    BLOCK_SIZE_N // 32,
                    BLOCK_SIZE_K // SCALE_GROUP_SIZE // 8,
                    4,
                    16,
                    2,
                    2,
                    1,
                )
                .permute(0, 5, 3, 1, 4, 2, 6)
                .reshape(BLOCK_SIZE_N, BLOCK_SIZE_K // SCALE_GROUP_SIZE)
            )

            if EVEN_K:
                a_bf16 = tl.load(a_ptrs)
                b = tl.load(b_ptrs, cache_modifier=cache_modifier)
            else:
                a_bf16 = tl.load(
                    a_ptrs,
                    mask=offs_k_bf16[None, :] < 2 * K - k_iter * BLOCK_SIZE_K,
                    other=0,
                )
                b = tl.load(
                    b_ptrs,
                    mask=offs_k_shuffle_arr[None, :] < (2 * K - k_iter * BLOCK_SIZE_K) * 16,
                    other=0,
                    cache_modifier=cache_modifier,
                )

            b = (
                b.reshape(
                    1,
                    BLOCK_SIZE_N // 16,
                    BLOCK_SIZE_K // 64,
                    2,
                    16,
                    16,
                )
                .permute(0, 1, 4, 2, 3, 5)
                .reshape(BLOCK_SIZE_N, BLOCK_SIZE_K // 2)
                .trans(1, 0)
            )
            a_q, a_scales = _mxfp4_quant_op(a_bf16, BLOCK_SIZE_K, BLOCK_SIZE_M, 32)
            accumulator = tl.dot_scaled(
                a_q, a_scales, "e2m1", b, b_scales, "e2m1", accumulator
            )

            a_ptrs += BLOCK_SIZE_K * stride_ak
            b_ptrs += (BLOCK_SIZE_K // 2) * 16 * stride_bk
            b_scale_ptrs += BLOCK_SIZE_K * stride_bsk

        c = accumulator
        offs_cm = pid_m * BLOCK_SIZE_M + tl.arange(0, BLOCK_SIZE_M).to(tl.int64)
        offs_cn = pid_n * BLOCK_SIZE_N + tl.arange(0, BLOCK_SIZE_N).to(tl.int64)
        c_ptrs = c_ptr + stride_cm * offs_cm[:, None] + stride_cn * offs_cn[None, :]
        c_mask = (offs_cm[:, None] < M) & (offs_cn[None, :] < N)
        tl.atomic_add(c_ptrs, c, mask=c_mask, sem="relaxed")


@triton.jit
def _direct_write(
    a_ptr,
    b_ptr,
    c_ptr,
    as_ptr,
    bss_ptr,
    M,
    N,
    K,
    BS_SN,
    s_am,
    s_ak,
    s_bn,
    s_bk,
    s_cm,
    s_cn,
    s_asm,
    s_ask,
    s_bssm,
    s_bssn,
    BLOCK_M: tl.constexpr,
    BLOCK_N: tl.constexpr,
    BLOCK_K: tl.constexpr,
):
    pid = tl.program_id(0)
    num_pid_n = tl.cdiv(N, BLOCK_N)
    pid_m = pid // num_pid_n
    pid_n = pid % num_pid_n

    scale_cols_per_row = BS_SN // 8
    offs_m = pid_m * BLOCK_M + tl.arange(0, BLOCK_M)
    offs_n = pid_n * BLOCK_N + tl.arange(0, BLOCK_N)
    acc = tl.zeros((BLOCK_M, BLOCK_N), dtype=tl.float32)

    for step in range(0, tl.cdiv(K, BLOCK_K)):
        k0 = step * BLOCK_K
        if k0 < K:
            offs_k_packed = (k0 // 2) + tl.arange(0, BLOCK_K // 2)
            offs_k_scale = (k0 // 32) + tl.arange(0, BLOCK_K // 32)

            a = tl.load(
                a_ptr + offs_m[:, None] * s_am + offs_k_packed[None, :] * s_ak,
                mask=(offs_m[:, None] < M) & (offs_k_packed[None, :] < (K // 2)),
                other=0,
            )
            a_scales = tl.load(
                as_ptr + offs_m[:, None] * s_asm + offs_k_scale[None, :] * s_ask,
                mask=(offs_m[:, None] < M) & (offs_k_scale[None, :] < (K // 32)),
                other=0,
            )
            b = tl.load(
                b_ptr + offs_n[:, None] * s_bn + offs_k_packed[None, :] * s_bk,
                mask=(offs_n[:, None] < N) & (offs_k_packed[None, :] < (K // 2)),
                other=0,
            )

            row = offs_n[:, None]
            col = offs_k_scale[None, :]
            group_row = row // 32
            rem_row_1 = (row % 32) // 16
            rem_row_2 = row % 16
            group_col = col // 8
            rem_col_1 = (col % 8) // 4
            rem_col_2 = col % 4
            packed_idx = (
                (((((group_row * scale_cols_per_row + group_col) * 4 + rem_col_2) * 16 + rem_row_2) * 2 + rem_col_1) * 2)
                + rem_row_1
            )
            b_scales = tl.load(
                bss_ptr
                + (packed_idx // BS_SN) * s_bssm
                + (packed_idx % BS_SN) * s_bssn,
                mask=(offs_n[:, None] < N) & (offs_k_scale[None, :] < (K // 32)),
                other=0,
            )

            acc = tl.dot_scaled(a, a_scales, "e2m1", tl.trans(b), b_scales, "e2m1", acc)

    tl.store(
        c_ptr + offs_m[:, None] * s_cm + offs_n[None, :] * s_cn,
        acc.to(tl.bfloat16),
        mask=(offs_m[:, None] < M) & (offs_n[None, :] < N),
    )


@triton.jit
def _direct_write_a16(
    a_ptr,
    b_ptr,
    c_ptr,
    bss_ptr,
    M,
    N,
    K,
    BS_SN,
    s_am,
    s_ak,
    s_bn,
    s_bk,
    s_cm,
    s_cn,
    s_bssm,
    s_bssn,
    BLOCK_M: tl.constexpr,
    BLOCK_N: tl.constexpr,
    BLOCK_K: tl.constexpr,
):
    pid = tl.program_id(0)
    num_pid_n = tl.cdiv(N, BLOCK_N)
    pid_m = pid // num_pid_n
    pid_n = pid % num_pid_n

    scale_cols_per_row = BS_SN // 8
    offs_m = pid_m * BLOCK_M + tl.arange(0, BLOCK_M)
    offs_n = pid_n * BLOCK_N + tl.arange(0, BLOCK_N)
    acc = tl.zeros((BLOCK_M, BLOCK_N), dtype=tl.float32)

    for step in range(0, tl.cdiv(K, BLOCK_K)):
        k0 = step * BLOCK_K
        if k0 < K:
            offs_k = k0 + tl.arange(0, BLOCK_K)
            a_bf16 = tl.load(
                a_ptr + offs_m[:, None] * s_am + offs_k[None, :] * s_ak,
                mask=(offs_m[:, None] < M) & (offs_k[None, :] < K),
                other=0,
            ).to(tl.float32)
            a_q, a_scales = _mxfp4_quant_op(a_bf16, BLOCK_K, BLOCK_M, 32)

            offs_k_packed = (k0 // 2) + tl.arange(0, BLOCK_K // 2)
            offs_k_scale = (k0 // 32) + tl.arange(0, BLOCK_K // 32)
            b = tl.load(
                b_ptr + offs_n[:, None] * s_bn + offs_k_packed[None, :] * s_bk,
                mask=(offs_n[:, None] < N) & (offs_k_packed[None, :] < (K // 2)),
                other=0,
            )

            row = offs_n[:, None]
            col = offs_k_scale[None, :]
            group_row = row // 32
            rem_row_1 = (row % 32) // 16
            rem_row_2 = row % 16
            group_col = col // 8
            rem_col_1 = (col % 8) // 4
            rem_col_2 = col % 4
            packed_idx = (
                (((((group_row * scale_cols_per_row + group_col) * 4 + rem_col_2) * 16 + rem_row_2) * 2 + rem_col_1) * 2)
                + rem_row_1
            )
            b_scales = tl.load(
                bss_ptr
                + (packed_idx // BS_SN) * s_bssm
                + (packed_idx % BS_SN) * s_bssn,
                mask=(offs_n[:, None] < N) & (offs_k_scale[None, :] < (K // 32)),
                other=0,
            )

            acc = tl.dot_scaled(a_q, a_scales, "e2m1", tl.trans(b), b_scales, "e2m1", acc)

    tl.store(
        c_ptr + offs_m[:, None] * s_cm + offs_n[None, :] * s_cn,
        acc.to(tl.bfloat16),
        mask=(offs_m[:, None] < M) & (offs_n[None, :] < N),
    )


@triton.jit
def _splitk_direct_a16_atomic(
    a_ptr,
    b_ptr,
    c_ptr,
    bss_ptr,
    M,
    N,
    K,
    BS_SN,
    s_am,
    s_ak,
    s_bn,
    s_bk,
    s_cm,
    s_cn,
    s_bssm,
    s_bssn,
    SK_BLOCK: tl.constexpr,
    BLOCK_M: tl.constexpr,
    BLOCK_N: tl.constexpr,
    BLOCK_K: tl.constexpr,
    SPLIT_K: tl.constexpr,
    MATRIX_INSTR_NONKDIM: tl.constexpr,
):
    pid_sk = tl.program_id(0) % SPLIT_K
    pid = tl.program_id(0) // SPLIT_K
    num_pid_n = tl.cdiv(N, BLOCK_N)
    pid_m = pid // num_pid_n
    pid_n = pid % num_pid_n

    k0_sk = pid_sk * SK_BLOCK
    scale_cols_per_row = BS_SN // 8
    offs_m = pid_m * BLOCK_M + tl.arange(0, BLOCK_M)
    offs_n = pid_n * BLOCK_N + tl.arange(0, BLOCK_N)
    acc = tl.zeros((BLOCK_M, BLOCK_N), dtype=tl.float32)

    row = offs_n[:, None]
    group_row = row // 32
    rem_row_1 = (row % 32) // 16
    rem_row_2 = row % 16
    row_scaled_base = group_row * scale_cols_per_row

    # Correct end boundary for this Split-K block
    max_k_in_split = k0_sk + SK_BLOCK
    end_k = tl.minimum(K, max_k_in_split)

    for step in range(0, tl.cdiv(SK_BLOCK, BLOCK_K)):
        k0 = k0_sk + step * BLOCK_K
        if k0 < end_k:
            offs_k = k0 + tl.arange(0, BLOCK_K)
            k_mask = (offs_k[None, :] < end_k)
            a_bf16 = tl.load(
                a_ptr + (offs_m[:, None] * s_am + offs_k[None, :] * s_ak),
                mask=(offs_m[:, None] < M) & k_mask,
                other=0,
            ).to(tl.float32)
            a_q, a_scales = _mxfp4_quant_op(a_bf16, BLOCK_K, BLOCK_M, 32)

            offs_k_packed = (k0 // 2) + tl.arange(0, BLOCK_K // 2)
            offs_k_scale = (k0 // 32) + tl.arange(0, BLOCK_K // 32)
            b = tl.load(
                b_ptr + (offs_n[:, None] * s_bn + offs_k_packed[None, :] * s_bk),
                mask=(offs_n[:, None] < N) & (offs_k_packed[None, :] < (K // 2)),
                other=0,
            )

            col = offs_k_scale[None, :]
            group_col = col // 8
            rem_col_2 = col % 4
            idx_logic = ((((row_scaled_base + group_col) * 4 + rem_col_2) * 16 + rem_row_2) * 2 + (col % 8 // 4)) * 2 + rem_row_1
            
            b_scales = tl.load(
                bss_ptr + (idx_logic // BS_SN) * s_bssm + (idx_logic % BS_SN) * s_bssn,
                mask=(offs_n[:, None] < N) & (offs_k_scale[None, :] < (K // 32)),
                other=0,
            )

            acc = tl.dot_scaled(a_q, a_scales, "e2m1", tl.trans(b), b_scales, "e2m1", acc)

    # atomic_add requires f32 pointer
    # Use sem="relaxed" for better performance on gfx950 and ensure acc is used
    tl.atomic_add(c_ptr + offs_m[:, None] * s_cm + offs_n[None, :] * s_cn, acc.to(tl.float32), mask=(offs_m[:, None] < M) & (offs_n[None, :] < N), sem="relaxed")




_A_CACHE_KEY = None
_A_CACHE_TENSOR = None
_AQ_U8 = None
_ASC_U8 = None
_ASC_RAW = None
_ASC_SH = None
_ASC_SH_KEY = None
_B_CACHE_KEY = None
_B_CACHE_TENSOR = None
_BQ_RAW_U8 = None
_BSC_RAW_U8 = None
_B_SCALE_RAW_KEY = None
_B_SCALE_RAW_TENSOR = None
_B_SCALE_RAW = None
_OUT_BUFS = {}
_ACCUM_BUFS = {}
_PARTIAL_BUFS = {}
_QUANT_BUFS = {}
_ASM_SCALE_BUFS = {}
_ASM_SCALE_SHUF_BUFS = {}
_A_PAD_BUFS = {}
_PADDED_M_CACHE = {}
_STAGE_TIMINGS_COUNTS = {}
_ACTIVE_STAGE_EVENTS = None


class _NullContext:
    def __enter__(self):
        return None

    def __exit__(self, exc_type, exc, tb):
        return False


_NULL_CONTEXT = _NullContext()


def _disable_compile(fn):
    compiler = getattr(torch, "compiler", None)
    if compiler is not None and hasattr(compiler, "disable"):
        return compiler.disable(fn)
    return fn


def _record_function(name: str):
    if not _ENABLE_PROFILE_CONTEXT:
        return _NULL_CONTEXT

    profiler = getattr(torch, "profiler", None)
    if profiler is not None and hasattr(profiler, "record_function"):
        return profiler.record_function(name)
    return _NULL_CONTEXT


def _stage_timing_enabled():
    return _STAGE_TIMINGS and hasattr(torch, "cuda") and torch.cuda.is_available()


def _profile_label(base: str, *dims):
    if not _PROFILE_TAGS or not dims:
        return base
    return f"{base}_{'x'.join(str(dim) for dim in dims)}"


@contextmanager
def _profile_range(base: str, *dims):
    global _ACTIVE_STAGE_EVENTS

    if not _PROFILE_TAGS and _ACTIVE_STAGE_EVENTS is None:
        yield
        return

    name = _profile_label(base, *dims)
    nvtx = getattr(getattr(torch, "cuda", None), "nvtx", None)
    pushed = False
    start_event = None
    end_event = None
    if _PROFILE_TAGS and nvtx is not None and hasattr(nvtx, "range_push"):
        try:
            nvtx.range_push(name)
            pushed = True
        except Exception:
            pushed = False
    if _ACTIVE_STAGE_EVENTS is not None and _stage_timing_enabled():
        try:
            start_event = torch.cuda.Event(enable_timing=True)
            end_event = torch.cuda.Event(enable_timing=True)
            start_event.record()
        except Exception:
            start_event = None
            end_event = None
    try:
        with _record_function(name):
            yield
    finally:
        if start_event is not None and end_event is not None:
            try:
                end_event.record()
                _ACTIVE_STAGE_EVENTS.append((name, start_event, end_event))
            except Exception:
                pass
        if pushed:
            try:
                nvtx.range_pop()
            except Exception:
                pass


def _to_contiguous(tensor, label: str, *dims):
    if tensor.is_contiguous():
        return tensor
    with _profile_range(label, *dims):
        return tensor.contiguous()


def _emit_stage_timings(route: str, shape):
    global _ACTIVE_STAGE_EVENTS

    if _ACTIVE_STAGE_EVENTS is None or not _stage_timing_enabled():
        return

    key = (route, *shape)
    count = _STAGE_TIMINGS_COUNTS.get(key, 0)
    if count >= _STAGE_TIMINGS_LIMIT:
        return
    _STAGE_TIMINGS_COUNTS[key] = count + 1

    try:
        torch.cuda.synchronize()
        stage_ms = {}
        for name, start_event, end_event in _ACTIVE_STAGE_EVENTS:
            elapsed_ms = start_event.elapsed_time(end_event)
            stage_ms[name] = stage_ms.get(name, 0.0) + elapsed_ms
        payload = {
            "shape": f"{shape[0]}x{shape[1]}x{shape[2]}",
            "route": route,
            "stages_ms": {name: round(value, 4) for name, value in sorted(stage_ms.items())},
        }
        print(f"[submission-stage] {json.dumps(payload, sort_keys=True)}", flush=True)
    except Exception:
        pass


def _quant_cache_hit(kind, a_in, n, variant=None):
    key = (kind, *a_in.shape, n) if variant is None else (kind, *a_in.shape, n, variant)
    return _A_CACHE_KEY == key and _A_CACHE_TENSOR is a_in


def _quantize_a_raw(a, n):
    global _A_CACHE_KEY
    global _A_CACHE_TENSOR
    global _AQ_U8
    global _ASC_U8
    global _ASC_RAW
    global _ASC_SH
    global _ASC_SH_KEY

    m, k = a.shape
    a_in = _to_contiguous(a, "submission.contiguous_a_raw", m, n, k)
    if _quant_cache_hit("raw", a_in, n):
        return

    with _profile_range("submission.quant_a_raw", m, n, k):
        if _dynamic_mxfp4_quant_kernel is None:
            aq_raw, asc_raw = dynamic_mxfp4_quant(a_in)
        else:
            aq_raw, asc_raw = _get_quant_bufs(a_in.device, m, k)
            block_size_m, block_size_n, num_iter, num_stages, num_warps = _get_quant_launch_config(m, k)
            grid = (
                triton.cdiv(m, block_size_m),
                triton.cdiv(k, block_size_n * num_iter),
            )
            _dynamic_mxfp4_quant_kernel[grid](
                a_in,
                aq_raw,
                asc_raw,
                *a_in.stride(),
                *aq_raw.stride(),
                *asc_raw.stride(),
                M=m,
                N=k,
                BLOCK_SIZE_M=block_size_m,
                BLOCK_SIZE_N=block_size_n,
                NUM_ITER=num_iter,
                NUM_STAGES=num_stages,
                MXFP4_QUANT_BLOCK_SIZE=32,
                SCALING_MODE=0,
                waves_per_eu=0,
                num_stages=1,
                num_warps=num_warps,
            )
    _A_CACHE_KEY = ("raw", m, k, n)
    _A_CACHE_TENSOR = a_in
    _AQ_U8 = aq_raw.view(_U8)
    _ASC_RAW = asc_raw
    _ASC_U8 = asc_raw.view(_U8)
    _ASC_SH = None
    _ASC_SH_KEY = None


def _quantize_a_asm(a, n):
    global _A_CACHE_KEY
    global _A_CACHE_TENSOR
    global _AQ_U8
    global _ASC_U8
    global _ASC_RAW
    global _ASC_SH
    global _ASC_SH_KEY

    m, k = a.shape
    shape = (m, n, k)
    a_in = _to_contiguous(a, "submission.contiguous_a_asm", m, n, k)
    padded_m = _get_asm_padded_m(shape)
    cache_variant = None if padded_m == m else padded_m
    if _quant_cache_hit("asm", a_in, n, cache_variant):
        return

    q_in = a_in
    if padded_m != m:
        with _profile_range("submission.pad_a_asm", padded_m, n, k):
            q_in = _get_a_pad_buf(a_in.device, padded_m, k)
            q_in[:m].copy_(a_in)
            q_in[m:padded_m].zero_()

    with _profile_range("submission.quant_a_asm", padded_m, n, k):
        if _dynamic_mxfp4_quant_kernel is None:
            aq_raw, asc_raw = dynamic_mxfp4_quant(q_in)
            asc_sh = None
        else:
            aq_raw, _ = _get_quant_bufs(a_in.device, padded_m, k)
            scale_cols = triton.cdiv(k, 32)
            block_size_m, block_size_n, num_iter, num_stages, num_warps = _get_quant_launch_config(padded_m, k)
            grid = (
                triton.cdiv(padded_m, block_size_m),
                triton.cdiv(k, block_size_n * num_iter),
            )
            if _mxfp4_quant_op is not None:
                scale_shuf = _get_asm_scale_shuf_buf(a_in.device, padded_m, scale_cols)
                _dynamic_mxfp4_quant_kernel_shuffled[grid](
                    q_in,
                    aq_raw,
                    scale_shuf,
                    *q_in.stride(),
                    *aq_raw.stride(),
                    *scale_shuf.stride(),
                    M=padded_m,
                    N=k,
                    BS_SN=scale_shuf.shape[1],
                    SCALE_COLS_VALID=scale_cols,
                    BLOCK_SIZE_M=block_size_m,
                    BLOCK_SIZE_N=block_size_n,
                    NUM_ITER=num_iter,
                    NUM_STAGES=num_stages,
                    MXFP4_QUANT_BLOCK_SIZE=32,
                    waves_per_eu=0,
                    num_stages=1,
                    num_warps=num_warps,
                )
                asc_raw = None
                asc_sh = scale_shuf.view(_FP8_E8M0)
            else:
                scale_pad, scale_shuf = _get_asm_scale_bufs(a_in.device, padded_m, scale_cols)
                _dynamic_mxfp4_quant_kernel[grid](
                    q_in,
                    aq_raw,
                    scale_pad,
                    *q_in.stride(),
                    *aq_raw.stride(),
                    *scale_pad.stride(),
                    M=padded_m,
                    N=k,
                    BLOCK_SIZE_M=block_size_m,
                    BLOCK_SIZE_N=block_size_n,
                    NUM_ITER=num_iter,
                    NUM_STAGES=num_stages,
                    MXFP4_QUANT_BLOCK_SIZE=32,
                    SCALING_MODE=0,
                    waves_per_eu=0,
                    num_stages=1,
                    num_warps=num_warps,
                )
                asc_raw = None
                with _profile_range("submission.shuffle_a_scales_asm", padded_m, n, k):
                    asc_sh = _shuffle_a_scales_padded_exact(scale_pad, scale_shuf)
    _A_CACHE_KEY = ("asm", m, k, n) if cache_variant is None else ("asm", m, k, n, cache_variant)
    _A_CACHE_TENSOR = a_in
    _AQ_U8 = aq_raw.view(_U8)
    _ASC_RAW = asc_raw
    _ASC_U8 = None if asc_raw is None else asc_raw.view(_U8)
    if asc_sh is not None:
        _ASC_SH = asc_sh
    else:
        with _profile_range("submission.shuffle_a_scales_asm_fallback", m, n, k):
            _ASC_SH = _shuffle_a_scales_exact(asc_raw)
    _ASC_SH_KEY = _A_CACHE_KEY


def _ensure_a_scales_shuffled():
    global _ASC_SH
    global _ASC_SH_KEY

    if _ASC_SH_KEY == _A_CACHE_KEY and _ASC_SH is not None:
        return

    if _ASC_RAW is None:
        raise RuntimeError("submission ASM scale cache is inconsistent")

    with _profile_range("submission.shuffle_a_scales_cache_miss"):
        _ASC_SH = _shuffle_a_scales_exact(_ASC_RAW)
    _ASC_SH_KEY = _A_CACHE_KEY


def _get_b_scales_raw(b_sc_sh, n, k):
    global _B_SCALE_RAW_KEY
    global _B_SCALE_RAW_TENSOR
    global _B_SCALE_RAW

    b_sc_in = _to_contiguous(b_sc_sh, "submission.contiguous_b_scales_raw", n, k)
    key = (n, k)
    if _B_SCALE_RAW_KEY == key and _B_SCALE_RAW_TENSOR is b_sc_in:
        return _B_SCALE_RAW

    with _profile_range("submission.unshuffle_b_scales", n, k):
        scale_u8 = b_sc_in.view(_U8)
        sh_rows, sh_cols = scale_u8.shape
        raw_cols = k // 32
        if sh_cols == raw_cols:
            _B_SCALE_RAW = b_sc_in
        else:
            raw_rows = sh_rows * 32
            raw_u8 = scale_u8.view(raw_rows, raw_cols)
            raw_u8 = raw_u8.view(raw_rows // 32, raw_cols // 8, 4, 16, 2, 2, 1)
            raw_u8 = raw_u8.permute(0, 5, 3, 1, 4, 2, 6).contiguous().view(raw_rows, raw_cols)
            _B_SCALE_RAW = raw_u8.view(_FP8_E8M0)

    _B_SCALE_RAW_KEY = key
    _B_SCALE_RAW_TENSOR = b_sc_in
    return _B_SCALE_RAW


def _get_b_raw_quant(b, n, k):
    global _B_CACHE_KEY
    global _B_CACHE_TENSOR
    global _BQ_RAW_U8
    global _BSC_RAW_U8

    b_in = _to_contiguous(b, "submission.contiguous_b_raw_quant", n, k)
    key = (n, k)
    if _B_CACHE_KEY == key and _B_CACHE_TENSOR is b_in:
        return _BQ_RAW_U8, _BSC_RAW_U8

    with _profile_range("submission.quant_b_raw", n, k):
        quant_func = aiter.get_triton_quant(aiter.QuantType.per_1x32)
        bq_raw, bsc_raw = quant_func(b_in, shuffle=False)

    _B_CACHE_KEY = key
    _B_CACHE_TENSOR = b_in
    _BQ_RAW_U8 = bq_raw.view(_U8)
    _BSC_RAW_U8 = bsc_raw.view(_U8)
    return _BQ_RAW_U8, _BSC_RAW_U8


def _get_out_buf(kind, device, rows, cols):
    key = (kind, device.index, rows, cols)
    out = _OUT_BUFS.get(key)
    if out is None:
        out = torch.empty((rows, cols), device=device, dtype=_BF16)
        _OUT_BUFS[key] = out
    return out


def _get_accum_buf(kind, device, rows, cols):
    key = (kind, device.index, rows, cols)
    out = _ACCUM_BUFS.get(key)
    if out is None:
        out = torch.empty((rows, cols), device=device, dtype=_F32)
        _ACCUM_BUFS[key] = out
    return out


def _get_partial_buf(device, split_k, m, n, dtype):
    key = (device.index, split_k, m, n, dtype)
    pp = _PARTIAL_BUFS.get(key)
    if pp is None:
        pp = torch.empty((split_k, m, n), device=device, dtype=dtype)
        _PARTIAL_BUFS[key] = pp
    return pp


def _get_quant_bufs(device, m, k):
    key = (device.index, m, k)
    bufs = _QUANT_BUFS.get(key)
    if bufs is None:
        bufs = (
            torch.empty((m, k // 2), dtype=torch.uint8, device=device),
            torch.empty((m, (k + 31) // 32), dtype=torch.uint8, device=device),
        )
        _QUANT_BUFS[key] = bufs
    return bufs


def _get_asm_scale_bufs(device, m, n):
    rows = triton.cdiv(m, 256) * 256
    cols = triton.cdiv(n, 8) * 8
    key = (device.index, m, n)
    bufs = _ASM_SCALE_BUFS.get(key)
    if bufs is None:
        bufs = (
            torch.full((rows, cols), 127, dtype=_U8, device=device),
            torch.empty((rows, cols), dtype=_U8, device=device),
        )
        _ASM_SCALE_BUFS[key] = bufs
    return bufs


def _get_asm_scale_shuf_buf(device, m, n):
    rows = triton.cdiv(m, 256) * 256
    cols = triton.cdiv(n, 8) * 8
    key = (device.index, m, n)
    scale_shuf = _ASM_SCALE_SHUF_BUFS.get(key)
    if scale_shuf is None:
        scale_shuf = torch.empty((rows, cols), dtype=_U8, device=device)
        _ASM_SCALE_SHUF_BUFS[key] = scale_shuf
    return scale_shuf


def _get_a_pad_buf(device, rows, cols):
    key = (device.index, rows, cols)
    a_pad = _A_PAD_BUFS.get(key)
    if a_pad is None:
        a_pad = torch.empty((rows, cols), device=device, dtype=_BF16)
        _A_PAD_BUFS[key] = a_pad
    return a_pad


def _get_asm_padded_m(shape):
    gl = _ASM_PAD_GL_OVERRIDES.get(shape)
    if gl is None or shape not in _ASM_PAD_SAFE_SHAPES:
        return shape[0]

    key = (*shape, gl)
    padded_m = _PADDED_M_CACHE.get(key)
    if padded_m is None:
        padded_m = _GET_PADDED_M(*shape, gl)
        _PADDED_M_CACHE[key] = padded_m
    return padded_m


def _shuffle_a_scales_exact(scale):
    scale_u8 = scale.view(_U8)
    m, n = scale_u8.shape
    scale_pad, scale_shuf = _get_asm_scale_bufs(scale_u8.device, m, n)
    scale_pad[:m, :n].copy_(scale_u8)
    return _shuffle_a_scales_padded_exact(scale_pad, scale_shuf)


def _shuffle_a_scales_padded_exact(scale_pad, scale_shuf):
    rows, cols = scale_pad.shape
    scale_shuf.view(rows // 32, cols // 8, 4, 16, 2, 2).copy_(
        scale_pad.view(rows // 32, 2, 16, cols // 8, 2, 4).permute(0, 3, 5, 2, 4, 1)
    )
    return scale_shuf.view(_FP8_E8M0)


def _get_quant_launch_config(m, k):
    config = _QUANT_CONFIG_OVERRIDES.get((m, k))
    if config is not None:
        return config

    if m <= 32:
        num_iter = 1
        block_size_m = triton.next_power_of_2(m)
        block_size_n = 32
        num_warps = 1
        num_stages = 1
    else:
        num_iter = 4
        block_size_m = 64
        block_size_n = 64
        num_warps = 4
        num_stages = 2
        if k <= 16384:
            block_size_m = 32
            block_size_n = 128

    if k <= 1024:
        num_iter = 1
        num_stages = 1
        num_warps = 4
        block_size_n = min(256, triton.next_power_of_2(k))
        block_size_n = max(32, block_size_n)
        block_size_m = min(8, triton.next_power_of_2(m))

    return block_size_m, block_size_n, num_iter, num_stages, num_warps


def _normalize_splitk(k, block_size_k, num_ksplit):
    splitk_block_size = (
        triton.cdiv((2 * triton.cdiv(k, num_ksplit)), block_size_k) * block_size_k
    )
    while num_ksplit > 1 and block_size_k > 16:
        if (
            k % (splitk_block_size // 2) == 0
            and splitk_block_size % block_size_k == 0
            and k % (block_size_k // 2) == 0
        ):
            break
        if k % (splitk_block_size // 2) != 0 and num_ksplit > 1:
            num_ksplit //= 2
        elif splitk_block_size % block_size_k != 0:
            if num_ksplit > 1:
                num_ksplit //= 2
            elif block_size_k > 16:
                block_size_k //= 2
        elif k % (block_size_k // 2) != 0 and block_size_k > 16:
            block_size_k //= 2
        else:
            break
        splitk_block_size = (
            triton.cdiv((2 * triton.cdiv(k, num_ksplit)), block_size_k) * block_size_k
        )
    num_ksplit = triton.cdiv(k, (splitk_block_size // 2))
    return splitk_block_size, block_size_k, num_ksplit


def _run_fused_preshuffle_route(a, b_shuf, b_sc_sh, config):
    if _FUSED_PRESHUFFLE_KERNEL is None:
        raise RuntimeError("submission fused preshuffle kernel is unavailable")

    m, k = a.shape
    k_packed = k // 2
    n = b_shuf.shape[0]
    a = _to_contiguous(a, "submission.contiguous_a_fused", m, n, k)
    b_shuf = _to_contiguous(b_shuf, "submission.contiguous_b_shuf_fused", m, n, k)
    b_sc_sh = _to_contiguous(b_sc_sh, "submission.contiguous_b_scales_fused", m, n, k)

    bsh_u8 = b_shuf.view(_U8).reshape(n // 16, (k // 2) * 16)
    bss_u8 = b_sc_sh.view(_U8).reshape(-1, k)

    kernel_config = dict(config)
    splitk_block_size, block_size_k, num_ksplit = _normalize_splitk(
        k_packed, kernel_config["BLOCK_SIZE_K"], kernel_config["NUM_KSPLIT"]
    )
    kernel_config["SPLITK_BLOCK_SIZE"] = splitk_block_size
    kernel_config["BLOCK_SIZE_K"] = block_size_k
    kernel_config["NUM_KSPLIT"] = num_ksplit
    grid = (
        kernel_config["NUM_KSPLIT"]
        * triton.cdiv(m, kernel_config["BLOCK_SIZE_M"])
        * triton.cdiv(n, kernel_config["BLOCK_SIZE_N"]),
    )

    if kernel_config["NUM_KSPLIT"] == 1:
        out = _get_out_buf("fused_preshuffle", a.device, m, n)
        with _profile_range("submission.route_fused_preshuffle", m, n, k):
            _FUSED_PRESHUFFLE_KERNEL[grid](
                a,
                bsh_u8,
                out,
                bss_u8,
                m,
                n,
                k_packed,
                a.stride(0),
                a.stride(1),
                bsh_u8.stride(0),
                bsh_u8.stride(1),
                0,
                out.stride(0),
                out.stride(1),
                bss_u8.stride(0),
                bss_u8.stride(1),
                PREQUANT=True,
                **kernel_config,
            )
        return out

    partial_dtype = _FUSED_PRESHUFFLE_PARTIAL_OVERRIDES.get((m, n, k), _F32)
    pp = _get_partial_buf(a.device, kernel_config["NUM_KSPLIT"], m, n, partial_dtype)
    out = _get_out_buf("fused_preshuffle_splitk", a.device, m, n)
    _write_num_warps, _write_num_stages, reduce_num_warps, reduce_num_stages = (
        _TRITON_LAUNCH_OVERRIDES.get((m, n, k), (8, 2, 8, 2))
    )
    reduce_bm, reduce_bn = _FUSED_PRESHUFFLE_REDUCE_OVERRIDES.get(
        (m, n, k), (kernel_config["BLOCK_SIZE_M"], kernel_config["BLOCK_SIZE_N"])
    )

    with _profile_range("submission.route_fused_preshuffle_write", m, n, k):
        _FUSED_PRESHUFFLE_KERNEL[grid](
            a,
            bsh_u8,
            pp,
            bss_u8,
            m,
            n,
            k_packed,
            a.stride(0),
            a.stride(1),
            bsh_u8.stride(0),
            bsh_u8.stride(1),
            pp.stride(0),
            pp.stride(1),
            pp.stride(2),
            bss_u8.stride(0),
            bss_u8.stride(1),
            PREQUANT=True,
            **kernel_config,
        )

    with _profile_range("submission.route_fused_preshuffle_reduce", m, n, k):
        _splitk_reduce[(triton.cdiv(m, reduce_bm), triton.cdiv(n, reduce_bn))](
            pp,
            out,
            m,
            n,
            pp.stride(0),
            pp.stride(1),
            pp.stride(2),
            out.stride(0),
            out.stride(1),
            reduce_bm,
            reduce_bn,
            kernel_config["NUM_KSPLIT"],
            num_warps=reduce_num_warps,
            num_stages=reduce_num_stages,
        )
    return out


def _run_a16_preshuffle_atomic_route(a, b_shuf, b_sc_sh, config):
    if _mxfp4_quant_op is None:
        raise RuntimeError("submission a16 preshuffle atomic kernel is unavailable")

    m, k = a.shape
    k_packed = k // 2
    n = b_shuf.shape[0]
    a = _to_contiguous(a, "submission.contiguous_a_a16_atomic", m, n, k)
    b_shuf = _to_contiguous(b_shuf, "submission.contiguous_b_shuf_a16_atomic", m, n, k)
    b_sc_sh = _to_contiguous(
        b_sc_sh, "submission.contiguous_b_scales_a16_atomic", m, n, k
    )

    bsh_u8 = b_shuf.view(_U8).reshape(n // 16, k_packed * 16)
    bss_u8 = b_sc_sh.view(_U8).reshape(-1, k)
    accum = _get_accum_buf("a16_preshuffle_atomic", a.device, m, n)
    out = _get_out_buf("a16_preshuffle_atomic", a.device, m, n)
    accum.zero_()

    kernel_config = dict(config)
    splitk_block_size, block_size_k, num_ksplit = _normalize_splitk(
        k_packed, kernel_config["BLOCK_SIZE_K"], kernel_config["NUM_KSPLIT"]
    )
    kernel_config["SPLITK_BLOCK_SIZE"] = splitk_block_size
    kernel_config["BLOCK_SIZE_K"] = block_size_k
    kernel_config["NUM_KSPLIT"] = num_ksplit
    if kernel_config["BLOCK_SIZE_K"] >= 2 * k_packed:
        kernel_config["BLOCK_SIZE_K"] = triton.next_power_of_2(2 * k_packed)
        kernel_config["SPLITK_BLOCK_SIZE"] = 2 * k_packed
        kernel_config["NUM_KSPLIT"] = 1
    kernel_config["BLOCK_SIZE_N"] = max(kernel_config["BLOCK_SIZE_N"], 32)

    grid = (
        kernel_config["NUM_KSPLIT"]
        * triton.cdiv(m, kernel_config["BLOCK_SIZE_M"])
        * triton.cdiv(n, kernel_config["BLOCK_SIZE_N"]),
    )

    with _profile_range("submission.route_a16_preshuffle_atomic", m, n, k):
        _a16_preshuffle_atomic_write[grid](
            a,
            bsh_u8,
            accum,
            bss_u8,
            m,
            n,
            k_packed,
            a.stride(0),
            a.stride(1),
            bsh_u8.stride(0),
            bsh_u8.stride(1),
            accum.stride(0),
            accum.stride(1),
            bss_u8.stride(0),
            bss_u8.stride(1),
            **kernel_config,
        )
    with _profile_range("submission.cast_a16_preshuffle_atomic", m, n, k):
        out.copy_(accum)
    return out


def _run_splitk_route(a, b_q, b_sc_sh, route):
    m, k = a.shape
    n = b_q.shape[0]
    b_q = _to_contiguous(b_q, "submission.contiguous_b_q_splitk", m, n, k)
    b_sc_sh = _to_contiguous(b_sc_sh, "submission.contiguous_b_scales_splitk", m, n, k)
    bm, bn, bk, split_k = route
    write_num_warps, write_num_stages, reduce_num_warps, reduce_num_stages = (
        _TRITON_LAUNCH_OVERRIDES.get((m, n, k), (8, 2, 8, 2))
    )
    partial_dtype, reduce_bm, reduce_bn = _SPLITK_PARTIAL_OVERRIDES.get(
        (m, n, k), (_F32, bm, bn)
    )
    partial_to_bf16 = partial_dtype == _BF16

    pp = _get_partial_buf(a.device, split_k, m, n, partial_dtype)
    out = _get_out_buf("splitk", a.device, m, n)

    bq_u8 = b_q.view(_U8)
    bss_u8 = b_sc_sh.view(_U8)
    splitk_block = triton.cdiv(k, split_k * bk) * bk

    with _profile_range("submission.route_splitk_write", m, n, k):
        _splitk_write[(split_k * triton.cdiv(m, bm) * triton.cdiv(n, bn),)](
            _AQ_U8,
            bq_u8,
            pp,
            _ASC_U8,
            bss_u8,
            m,
            n,
            k,
            bss_u8.shape[1],
            _AQ_U8.stride(0),
            _AQ_U8.stride(1),
            bq_u8.stride(0),
            bq_u8.stride(1),
            pp.stride(0),
            pp.stride(1),
            pp.stride(2),
            _ASC_U8.stride(0),
            _ASC_U8.stride(1),
            bss_u8.stride(0),
            bss_u8.stride(1),
            splitk_block,
            partial_to_bf16,
            bm,
            bn,
            bk,
            split_k,
            num_warps=write_num_warps,
            num_stages=write_num_stages,
        )

    with _profile_range("submission.route_splitk_reduce", m, n, k):
        _splitk_reduce[(triton.cdiv(m, reduce_bm), triton.cdiv(n, reduce_bn))](
            pp,
            out,
            m,
            n,
            pp.stride(0),
            pp.stride(1),
            pp.stride(2),
            out.stride(0),
            out.stride(1),
            reduce_bm,
            reduce_bn,
            split_k,
            num_warps=reduce_num_warps,
            num_stages=reduce_num_stages,
    )
    return out


def _run_splitk_atomic_route(a, b_q, b_sc_sh, route):
    m, k = a.shape
    n = b_q.shape[0]
    b_q = _to_contiguous(b_q, "submission.contiguous_b_q_splitk_atomic", m, n, k)
    b_sc_sh = _to_contiguous(
        b_sc_sh, "submission.contiguous_b_scales_splitk_atomic", m, n, k
    )
    bm, bn, bk, split_k = route
    write_num_warps, write_num_stages, _reduce_num_warps, _reduce_num_stages = (
        _TRITON_LAUNCH_OVERRIDES.get((m, n, k), (8, 2, 8, 2))
    )

    accum = _get_accum_buf("splitk_atomic", a.device, m, n)
    out = _get_out_buf("splitk_atomic", a.device, m, n)
    accum.zero_()

    bq_u8 = b_q.view(_U8)
    bss_u8 = b_sc_sh.view(_U8)
    splitk_block = triton.cdiv(k, split_k * bk) * bk

    with _profile_range("submission.route_splitk_atomic_write", m, n, k):
        _splitk_atomic_write[(split_k * triton.cdiv(m, bm) * triton.cdiv(n, bn),)](
            _AQ_U8,
            bq_u8,
            accum,
            _ASC_U8,
            bss_u8,
            m,
            n,
            k,
            bss_u8.shape[1],
            _AQ_U8.stride(0),
            _AQ_U8.stride(1),
            bq_u8.stride(0),
            bq_u8.stride(1),
            accum.stride(0),
            accum.stride(1),
            _ASC_U8.stride(0),
            _ASC_U8.stride(1),
            bss_u8.stride(0),
            bss_u8.stride(1),
            splitk_block,
            bm,
            bn,
            bk,
            split_k,
            num_warps=write_num_warps,
            num_stages=write_num_stages,
        )

    with _profile_range("submission.cast_splitk_atomic", m, n, k):
        out.copy_(accum)
    return out
def _run_direct_route(a, b_q, b_sc_sh, route):
    m, k = a.shape
    n = b_q.shape[0]
    b_q = _to_contiguous(b_q, "submission.contiguous_b_q_direct", m, n, k)
    b_sc_sh = _to_contiguous(b_sc_sh, "submission.contiguous_b_scales_direct", m, n, k)
    bm, bn, bk, _split_k = route

    out = _get_out_buf("direct", a.device, m, n)
    bq_u8 = b_q.view(_U8)
    bss_u8 = b_sc_sh.view(_U8)

    with _profile_range("submission.route_direct", m, n, k):
        _direct_write[(triton.cdiv(m, bm) * triton.cdiv(n, bn),)](
            _AQ_U8,
            bq_u8,
            out,
            _ASC_U8,
            bss_u8,
            m,
            n,
            k,
            bss_u8.shape[1],
            _AQ_U8.stride(0),
            _AQ_U8.stride(1),
            bq_u8.stride(0),
            bq_u8.stride(1),
            out.stride(0),
            out.stride(1),
            _ASC_U8.stride(0),
            _ASC_U8.stride(1),
            bss_u8.stride(0),
            bss_u8.stride(1),
            bm,
            bn,
            bk,
            num_warps=8,
            num_stages=2,
        )
    return out


def _run_direct_a16_route(a, b_q, b_sc_sh, route):
    m, k = a.shape
    n = b_q.shape[0]
    a = _to_contiguous(a, "submission.contiguous_a_direct_a16", m, n, k)
    b_q = _to_contiguous(b_q, "submission.contiguous_b_q_direct_a16", m, n, k)
    b_sc_sh = _to_contiguous(b_sc_sh, "submission.contiguous_b_scales_direct_a16", m, n, k)
    bm, bn, bk, num_warps, num_stages = route

    out = _get_out_buf("direct_a16", a.device, m, n)
    bq_u8 = b_q.view(_U8)
    bss_u8 = b_sc_sh.view(_U8)

    with _profile_range("submission.route_direct_a16", m, n, k):
        _direct_write_a16[(triton.cdiv(m, bm) * triton.cdiv(n, bn),)](
            a,
            bq_u8,
            out,
            bss_u8,
            m,
            n,
            k,
            bss_u8.shape[1],
            a.stride(0),
            a.stride(1),
            bq_u8.stride(0),
            bq_u8.stride(1),
            out.stride(0),
            out.stride(1),
            bss_u8.stride(0),
            bss_u8.stride(1),
            bm,
            bn,
            bk,
            num_warps=num_warps,
            num_stages=num_stages,
    )
    return out


def _run_official_a16_route(a, b, config):
    if _OFFICIAL_A16_KERNEL is None:
        raise RuntimeError("submission official a16wfp4 kernel is unavailable")

    m, k = a.shape
    k_packed = k // 2
    n = b.shape[0]
    a = _to_contiguous(a, "submission.contiguous_a_official_a16", m, n, k)
    bq_u8, b_scale_raw = _get_b_raw_quant(b, n, k)
    bq_t = bq_u8.T
    out = _get_out_buf("official_a16", a.device, m, n)
    kernel_config = dict(config)

    if kernel_config["BLOCK_SIZE_K"] >= 2 * k_packed:
        kernel_config["BLOCK_SIZE_K"] = triton.next_power_of_2(2 * k_packed)
        kernel_config["SPLITK_BLOCK_SIZE"] = 2 * k_packed
        kernel_config["NUM_KSPLIT"] = 1
    else:
        kernel_config["SPLITK_BLOCK_SIZE"] = 2 * k_packed

    with _profile_range("submission.route_official_a16", m, n, k):
        _OFFICIAL_A16_KERNEL[(
            kernel_config["NUM_KSPLIT"]
            * triton.cdiv(m, kernel_config["BLOCK_SIZE_M"])
            * triton.cdiv(n, kernel_config["BLOCK_SIZE_N"]),
        )](
            a,
            bq_t,
            out,
            b_scale_raw,
            m,
            n,
            k_packed,
            a.stride(0),
            a.stride(1),
            bq_t.stride(0),
            bq_t.stride(1),
            0,
            out.stride(0),
            out.stride(1),
            b_scale_raw.stride(0),
            b_scale_raw.stride(1),
            ATOMIC_ADD=False,
            **kernel_config,
        )
    return out


_DIRECT_A16_ATOMIC_LOCKED_PARAMS = {}

_GRAPH_CACHE = {}

def _run_direct_a16_atomic_route(a, b_q, b_sc_sh, route):
    m, k = a.shape
    n = b_q.shape[0]
    device = a.device.index
    _fast_set_device(a.device)

    bm, bn, bk, split_k, num_warps, num_stages = route
    # Correctly propagate splitk_block to avoid arange errors
    splitk_block = triton.cdiv(k, split_k)
    bs_sn_val = k // 32
    matrix_instr_nonkdim = 16 if m <= 16 else 32
    
    # Grid definition
    grid = (triton.cdiv(m, bm), triton.cdiv(n, bn), split_k)

    # Build a unique key for the graph cache based on shape and params
    graph_key = (m, n, k, bm, bn, bk, split_k, matrix_instr_nonkdim, num_warps, num_stages)
    
    # Ensure inputs are contiguous FOR REAL
    if not a.is_contiguous(): a = a.contiguous()
    if not b_q.is_contiguous(): b_q = b_q.contiguous()
    if not b_sc_sh.is_contiguous(): b_sc_sh = b_sc_sh.contiguous()

    out = _get_out_buf("direct_a16_atomic", a.device, m, n)
    accum = _get_accum_buf("direct_a16_atomic", a.device, m, n)
    
    bq_u8 = b_q.view(_U8)
    bss_u8 = b_sc_sh.view(_U8)

    if graph_key not in _GRAPH_CACHE:
        # Warm up outside the graph to ensure compilation and constant propagation
        _splitk_direct_a16_atomic[grid](
            a, bq_u8, accum, bss_u8,
            m, n, k, bs_sn_val,
            a.stride(0), a.stride(1),
            bq_u8.stride(0), bq_u8.stride(1),
            accum.stride(0), accum.stride(1),
            bss_u8.stride(0), bss_u8.stride(1),
            SK_BLOCK=splitk_block,
            BLOCK_M=bm,
            BLOCK_N=bn,
            BLOCK_K=bk,
            SPLIT_K=split_k,
            MATRIX_INSTR_NONKDIM=matrix_instr_nonkdim,
            num_warps=num_warps,
            num_stages=num_stages,
        )
        
        g = torch.cuda.CUDAGraph()
        # Minimal static buffers for graph capture
        with torch.cuda.graph(g):
            accum.zero_()
            _splitk_direct_a16_atomic[grid](
                a, bq_u8, accum, bss_u8,
                m, n, k, bs_sn_val,
                a.stride(0), a.stride(1),
                bq_u8.stride(0), bq_u8.stride(1),
                accum.stride(0), accum.stride(1),
                bss_u8.stride(0), bss_u8.stride(1),
                SK_BLOCK=splitk_block,
                BLOCK_M=bm,
                BLOCK_N=bn,
                BLOCK_K=bk,
                SPLIT_K=split_k,
                MATRIX_INSTR_NONKDIM=matrix_instr_nonkdim,
                num_warps=num_warps,
                num_stages=num_stages,
            )
            out.copy_(accum)
        _GRAPH_CACHE[graph_key] = g
    
    # Replay the graph
    _GRAPH_CACHE[graph_key].replay()
    return out


def _run_asm_route(a, b_shuf, b_sc_sh, kernel_name):
    m, k = a.shape
    n = b_shuf.shape[0]
    b_shuf = _to_contiguous(b_shuf, "submission.contiguous_b_shuf_asm", m, n, k)
    b_sc_sh = _to_contiguous(b_sc_sh, "submission.contiguous_b_scales_asm", m, n, k)
    out_rows = (max(m, _AQ_U8.shape[0]) + 31) & -32
    out = _get_out_buf("asm", a.device, out_rows, n)
    _ensure_a_scales_shuffled()
    with _profile_range("submission.route_asm", m, n, k):
        _GEMM_ASM(
            _AQ_U8.view(_FP4X2),
            b_shuf.view(_FP4X2),
            _ASC_SH,
            b_sc_sh.view(_FP8_E8M0),
            out,
            kernel_name,
            None,
            1.0,
            0.0,
            True,
            None,
    )
    return out if out_rows == m else out[:m]


def _run_generic_aiter_route(a, b_shuf, b_sc_sh):
    m, k = a.shape
    n = b_shuf.shape[0]
    b_shuf = _to_contiguous(b_shuf, "submission.contiguous_b_shuf_aiter", m, n, k)
    b_sc_sh = _to_contiguous(b_sc_sh, "submission.contiguous_b_scales_aiter", m, n, k)
    _ensure_a_scales_shuffled()
    a_q = _AQ_U8[:m].view(_FP4X2)
    a_sc = _ASC_SH[:m]
    if not a_sc.is_contiguous():
        a_sc = _to_contiguous(a_sc, "submission.contiguous_a_scales_aiter", m, n, k)
    with _profile_range("submission.route_aiter_generic", m, n, k):
        return aiter.gemm_a4w4(
            a_q,
            b_shuf.view(_FP4X2),
            a_sc,
            b_sc_sh.view(_FP8_E8M0),
            dtype=dtypes.bf16,
            bpreshuffle=True,
        )


@_disable_compile
def custom_kernel(data: input_t) -> output_t:
    global _ACTIVE_STAGE_EVENTS

    a, _b, b_q, b_shuf, b_sc_sh = data
    m, k = a.shape
    n = b_shuf.shape[0]
    shape = (m, n, k)
    route_name = "unknown"
    stage_timing_active = _STAGE_TIMINGS
    prev_stage_events = _ACTIVE_STAGE_EVENTS if stage_timing_active else None
    if stage_timing_active:
        _ACTIVE_STAGE_EVENTS = []

    try:
        with _profile_range("submission.custom_kernel", m, n, k):
            if shape == (4, 2880, 512):
                route_name = "asm"
                _quantize_a_asm(a, n)
                kernel_name = _ASM_KERNEL_OVERRIDES.get(shape, _ASM_MAP.get(shape))
                if kernel_name is not None:
                    return _run_asm_route(a, b_shuf, b_sc_sh, kernel_name)
                return _run_generic_aiter_route(a, b_shuf, b_sc_sh)

            fused_config = _FUSED_PRESHUFFLE_ROUTES.get(shape)
            if fused_config is not None and _FUSED_PRESHUFFLE_KERNEL is not None:
                route_name = "fused_preshuffle"
                return _run_fused_preshuffle_route(a, b_shuf, b_sc_sh, fused_config)

            official_a16_route = (
                _OFFICIAL_A16_ROUTES.get(shape) if _ENABLE_OFFICIAL_A16_ROUTE else None
            )
            if official_a16_route is not None and _OFFICIAL_A16_KERNEL is not None:
                route_name = "official_a16"
                return _run_official_a16_route(a, _b, official_a16_route)

            route = _TRITON_ROUTES.get(shape)
            if route is not None:
                direct_a16_atomic_route = _A16_DIRECT_ATOMIC_ROUTES.get(shape)
                if direct_a16_atomic_route is not None and _mxfp4_quant_op is not None:
                    route_name = "direct_a16_atomic"
                    return _run_direct_a16_atomic_route(
                        a, b_q, b_sc_sh, direct_a16_atomic_route
                    )
                fused_a16_route = _FUSED_A16_DIRECT_ROUTES.get(shape)
                if fused_a16_route is not None and _mxfp4_quant_op is not None:
                    route_name = "direct_a16"
                    return _run_direct_a16_route(a, b_q, b_sc_sh, fused_a16_route)
                atomic_a16_route = _A16_PRESHUFFLE_ATOMIC_ROUTES.get(shape)
                if atomic_a16_route is not None and _mxfp4_quant_op is not None:
                    route_name = "a16_preshuffle_atomic"
                    return _run_a16_preshuffle_atomic_route(
                        a, b_shuf, b_sc_sh, atomic_a16_route
                    )
                _quantize_a_raw(a, n)
                splitk_atomic_route = _SPLITK_ATOMIC_ROUTES.get(shape)
                if splitk_atomic_route is not None:
                    route_name = "splitk_atomic"
                    return _run_splitk_atomic_route(a, b_q, b_sc_sh, splitk_atomic_route)
                if route[3] == 1:
                    route_name = "direct"
                    return _run_direct_route(a, b_q, b_sc_sh, route)
                route_name = "splitk"
                return _run_splitk_route(a, b_q, b_sc_sh, route)

            _quantize_a_asm(a, n)
            kernel_name = _ASM_KERNEL_OVERRIDES.get(shape, _ASM_MAP.get(shape))
            if kernel_name is not None:
                route_name = "asm"
                return _run_asm_route(a, b_shuf, b_sc_sh, kernel_name)
            route_name = "aiter_generic"
            return _run_generic_aiter_route(a, b_shuf, b_sc_sh)
    finally:
        _emit_stage_timings(route_name, shape)
        if stage_timing_active:
            _ACTIVE_STAGE_EVENTS = prev_stage_events
scrolls · 2014 lines total

Source code from GPU Mode and the KernelBot dataset · June 9 Researcher Reciprocity License v1.0

Best evidence level for this revision: reported

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