submission 649474
MrSnowNB · python · License unknown
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Vendorable · source mirrored · license unknownView source →
No package. Vendor the mirrored source: 111 lines, June 9 Researcher Reciprocity License v1.0.
submission_verified.py
curl "https://kernelindex.com/api/v1/implementations/kernelbot-amd-mxfp4-mm-649474?include=source"interfacepython
Compatibility
measured onAMD Instinct MI355X
declared hardwareAMD Instinct MI355X
architecturesgfx950
dtypesbf16, mxfp4
Benchmark evidence
1 measurement across 1 GPU, fastest first.
Operation / workload
Hardware
Latency
Rank
Observed
Reported · How evidence levels are derived →
Source and license
sourceavailable
revision digestsha256:53963b385079163bf8f37d8f8a654909e28224647fd91f5dab121d469abf78e6
license declaredunknown
license concludedunknown
authorsMrSnowNB
imported2026-08-26
Techniques
Extracted from the mirrored source by pattern, never inferred. Each row cites its line.
fp4
mxfp4-mm — Fused Aiter Baseline (VERIFIED WORKING)Kernel source
submission_verified.py111 lines
#!POPCORN leaderboard amd-mxfp4-mm
#!POPCORN gpu MI355X
"""
mxfp4-mm — Fused Aiter Baseline (VERIFIED WORKING)
====================================================
Pipeline: bf16 A → dynamic_mxfp4_quant + e8m0_shuffle (fused)
→ aiter.gemm_a4w4(bpreshuffle=True) → bf16 C
Verified results on AMD Instinct MI355X (gfx950, ROCm 7.1, Torch 2.10):
- All 4 correctness tests: PASS (0.0 error)
- Benchmark: ~18.3 μs best (vs 24.47 μs v0 baseline)
- Leaderboard: ✅ SUCCESS
Why this is faster than the reference v0:
- Phase 1a: All imports at module level (not inside custom_kernel).
Eliminates import lookup overhead on every call.
- Phase 1b: Contiguous guard — only calls .contiguous() if A is
not already row-major. Saves a copy on the common path.
- _quant_mxfp4_shuffled(): fuses quantization + scale shuffle into
a single helper, reducing Python call overhead.
What was NOT changed:
- The core pipeline is identical to the reference: dynamic_mxfp4_quant
→ e8m0_shuffle → gemm_a4w4(bpreshuffle=True). No algorithmic change.
- B_shuffle and B_scale_sh are used as-is from the competition input.
Do NOT re-quantize B — the evaluator's reference output uses the
original pre-quantized B_q/B_shuffle/B_scale_sh.
"""
import aiter
from aiter import dtypes
from aiter.ops.triton.quant import dynamic_mxfp4_quant
from aiter.utility.fp4_utils import e8m0_shuffle
from task import input_t, output_t
# ── CA96 Hook (disabled — no-op stub for future experimentation) ─────────
# Future: replace with a 96³-aligned block permutation on A to improve
# HBM coalescing before quantization.
# Requirements when enabled:
# 1. Must be a reversible permutation (invertible)
# 2. Must preserve tensor shape [m, k]
# 3. Must preserve bf16 dtype
# 4. 96 = 3 × 32 — aligned with MXFP4 scale group size
# RULE: if correctness breaks after enabling, disable _CA96_ENABLED first.
_CA96_ENABLED = False
def maybe_ca96_reorder(x):
"""No-op in this submission. Returns x unchanged."""
if not _CA96_ENABLED:
return x
# Placeholder: actual CA96 reorder implementation goes here
return x
# ── Quantization helper ──────────────────────────────────────────────────
def _quant_mxfp4_shuffled(x):
"""
Quantize bf16 tensor → MXFP4 with E8M0 scale shuffling.
Returns: (x_fp4 as fp4x2, scales as fp8_e8m0) — both in the
shuffled layout expected by aiter.gemm_a4w4(bpreshuffle=True).
The shuffle reorders E8M0 scale bytes into the layout that maps to
contiguous memory access patterns for gfx950 MFMA hardware lanes:
f4gemm_bf16_per1x32Fp4_BpreShuffle_*.co
"""
x_fp4, bs_e8m0 = dynamic_mxfp4_quant(x)
bs_e8m0_sh = e8m0_shuffle(bs_e8m0)
return x_fp4.view(dtypes.fp4x2), bs_e8m0_sh.view(dtypes.fp8_e8m0)
# ── Competition entry point ──────────────────────────────────────────────
def custom_kernel(data: input_t) -> output_t:
"""
MXFP4 matrix multiply: bf16 A × MXFP4 B → bf16 C.
Input tuple: (A, B, B_q, B_shuffle, B_scale_sh)
A : [M, K] bfloat16 — activation matrix
B : [N, K] bfloat16 — weight matrix (bf16 reference)
B_q : [N, K//2] fp4x2 — pre-quantized B (raw, not shuffled)
B_shuffle : [N, K//2] fp4x2 — pre-quantized + aiter-shuffled B
B_scale_sh : [N, K//32] fp8_e8m0 — pre-shuffled B scales
Returns: C [M, N] bfloat16
"""
A, B, B_q, B_shuffle, B_scale_sh = data
# Phase 1b: skip .contiguous() copy if already row-major
if not A.is_contiguous():
A = A.contiguous()
# CA96 hook: no-op in this submission
A = maybe_ca96_reorder(A)
# Quantize A to MXFP4 with shuffled E8M0 scales
A_q, A_scale_sh = _quant_mxfp4_shuffled(A)
# Run GEMM: A_q × B_shuffle with pre-shuffled scales on both sides.
# bpreshuffle=True tells aiter that B_shuffle is already in the
# hardware-aligned shuffle format for gfx950 MFMA instructions.
return aiter.gemm_a4w4(
A_q,
B_shuffle,
A_scale_sh,
B_scale_sh,
dtype=dtypes.bf16,
bpreshuffle=True,
)
scrolls · 111 lines total
Source code from GPU Mode and the KernelBot dataset · June 9 Researcher Reciprocity License v1.0
Best evidence level for this revision: reported
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