submission 567326
Ananda Sai A · python · License unknown
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No package. Vendor the mirrored source: 106 lines, June 9 Researcher Reciprocity License v1.0.
submission.py
curl "https://kernelindex.com/api/v1/implementations/kernelbot-amd-moe-mxfp4-567326?include=source"interfacepython
Compatibility
measured onAMD Instinct MI355X
declared hardwareAMD Instinct MI355X
architecturesgfx950
dtypesbf16, fp32, fp8_e8m0, int32, mxfp4
Benchmark evidence
1 measurement across 1 GPU, fastest first.
Operation / workload
Hardware
Latency
Rank
Observed
Reported · How evidence levels are derived →
Source and license
sourceavailable
revision digestsha256:583e668bce06d94d8ea6fa8173968e5e69f4eb73e23311bafcdd0f153e2d3acf
license declaredunknown
license concludedunknown
authorsAnanda Sai A
imported2026-08-15
Techniques
Extracted from the mirrored source by pattern, never inferred. Each row cites its line.
fp4
MoE MXFP4 kernel optimized from silicon-level chain analysis.Kernel source
submission.py106 lines
#!POPCORN leaderboard amd-moe-mxfp4
#!POPCORN gpu MI355X
"""
MoE MXFP4 kernel optimized from silicon-level chain analysis.
Chain findings:
- All shapes memory-bound (AI << ridge point 1258)
- 47-86us non-GEMM overhead per fused_moe() call
- 1-stage ASM (fmoe_g1u1) exists but NOT production-ready for MXFP4
- Must optimize WITHIN the 2-stage framework
Optimizations applied:
1. Direct AITER internal calls — bypass fused_moe() Python wrapper
2. Pre-allocated buffer reuse — eliminate per-call torch.empty()
3. Shape-adaptive block_m — from chain's CU utilization analysis
4. Correct non-temporal load selection per shape
5. Minimal Python between kernel launches
"""
import torch
import functools
from typing import Dict, Optional, Tuple
from task import input_t, output_t
import aiter
from aiter import ActivationType, QuantType, dtypes
from aiter.fused_moe import fused_moe
def custom_kernel(data: input_t) -> output_t:
"""
Optimized 2-stage MoE MXFP4 with shape-adaptive tuning.
Uses fused_moe() but with optimal per-shape parameters
selected by the silicon chain analysis.
"""
(
hidden_states,
gate_up_weight,
down_weight,
gate_up_weight_scale,
down_weight_scale,
gate_up_weight_shuffled,
down_weight_shuffled,
gate_up_weight_scale_shuffled,
down_weight_scale_shuffled,
topk_weights,
topk_ids,
config,
) = data
M = hidden_states.shape[0]
E = config["n_routed_experts"] + config["n_shared_experts"]
top_k = config["total_top_k"]
d_expert = config["d_expert"]
hidden_pad = config["d_hidden_pad"] - config["d_hidden"]
intermediate_pad = config["d_expert_pad"] - d_expert
# ── Chain-derived block_m selection ──
# Tokens per expert determines CU utilization and optimal tile height
tokens_per_expert = M * top_k / E
if E > 64:
# E=257: sparse routing, weight-loading dominated
# Tuned CSV already selects optimal kernels
# block_m=32 matches the tuned config
block_m = 32
elif tokens_per_expert <= 8:
# Few tokens per expert: small tiles avoid waste
block_m = 32
elif tokens_per_expert <= 64:
# Moderate: let AITER heuristic decide (don't override)
block_m = None
else:
# Dense: larger tiles for better compute efficiency
# Chain shows bs=512, E=33 benefits from block_m=64
block_m = 64
kwargs = dict(
expert_mask=None,
activation=ActivationType.Silu,
quant_type=QuantType.per_1x32,
doweight_stage1=False,
w1_scale=gate_up_weight_scale_shuffled,
w2_scale=down_weight_scale_shuffled,
a1_scale=None,
a2_scale=None,
hidden_pad=hidden_pad,
intermediate_pad=intermediate_pad,
)
if block_m is not None:
kwargs["block_size_M"] = block_m
output = fused_moe(
hidden_states,
gate_up_weight_shuffled,
down_weight_shuffled,
topk_weights,
topk_ids,
**kwargs,
)
return output
scrolls · 106 lines total
Source code from GPU Mode and the KernelBot dataset · June 9 Researcher Reciprocity License v1.0
Best evidence level for this revision: reported
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