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gemini-2.5-pro / cuda1d80a9

gemini-2.5-pro_cuda_1d80a9 · gemini-2.5-pro · cuda · Apache-2.0

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Vendorable · source mirrored · Apache-2.0View source →

No package. Vendor the mirrored source: 86 lines, Apache-2.0, pinned at da91508.

main.cpp
curl "https://kernelindex.com/api/v1/implementations/flashinfer-gemini-2-5-pro-cuda-1d80a9?include=source"
interfacecuda
revisionda915083d4c7
symbolrun
pathmain.cpp
Compatibility
measured onNVIDIA B200
declared hardwareNVIDIA B200
architecturessm_100
dtypesfp16

Benchmark evidence

43 measurements across 1 GPU, fastest first.

Operation / workload
Hardware
Latency
Rank
Observed
GEMM n4096 k4096fp16 · [16, 4096]
NVIDIA B200
15.8µs
#1 of 8
2025-10-16
GEMM n4096 k4096fp16 · [15, 4096]
NVIDIA B200
15.8µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [35, 4096]
NVIDIA B200
15.9µs
#1 of 8
2025-10-16
GEMM n4096 k4096fp16 · [64, 4096]
NVIDIA B200
15.9µs
#2 of 7
2025-10-16
GEMM n4096 k4096fp16 · [70, 4096]
NVIDIA B200
16.0µs
#1 of 7
2025-10-16
GEMM n4096 k4096fp16 · [32, 4096]
NVIDIA B200
16.0µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [48, 4096]
NVIDIA B200
16.0µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [24, 4096]
NVIDIA B200
16.0µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [40, 4096]
NVIDIA B200
16.1µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [80, 4096]
NVIDIA B200
16.1µs
#1 of 8
2025-10-16
Show all 43 measurements ›
GEMM n4096 k4096fp16 · [96, 4096]
NVIDIA B200
16.1µs
#1 of 8
2025-10-16
GEMM n4096 k4096fp16 · [112, 4096]
NVIDIA B200
16.2µs
#1 of 8
2025-10-16
GEMM n4096 k4096fp16 · [128, 4096]
NVIDIA B200
16.2µs
#2 of 9
2025-10-16
GEMM n4096 k4096fp16 · [56, 4096]
NVIDIA B200
16.2µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [120, 4096]
NVIDIA B200
16.4µs
#3 of 8
2025-10-16
GEMM n4096 k4096fp16 · [136, 4096]
NVIDIA B200
16.4µs
#2 of 7
2025-10-16
GEMM n4096 k4096fp16 · [104, 4096]
NVIDIA B200
16.4µs
#2 of 7
2025-10-16
GEMM n4096 k4096fp16 · [72, 4096]
NVIDIA B200
16.4µs
#2 of 7
2025-10-16
GEMM n4096 k4096fp16 · [152, 4096]
NVIDIA B200
16.4µs
#3 of 8
2025-10-16
GEMM n4096 k4096fp16 · [144, 4096]
NVIDIA B200
16.4µs
#2 of 7
2025-10-16
GEMM n4096 k4096fp16 · [160, 4096]
NVIDIA B200
16.4µs
#2 of 7
2025-10-16
GEMM n4096 k4096fp16 · [88, 4096]
NVIDIA B200
16.5µs
#2 of 7
2025-10-16
GEMM n4096 k4096fp16 · [168, 4096]
NVIDIA B200
16.6µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [184, 4096]
NVIDIA B200
16.7µs
#2 of 7
2025-10-16
GEMM n4096 k4096fp16 · [176, 4096]
NVIDIA B200
16.7µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [192, 4096]
NVIDIA B200
16.8µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [208, 4096]
NVIDIA B200
16.9µs
#1 of 9
2025-10-16
GEMM n4096 k4096fp16 · [216, 4096]
NVIDIA B200
16.9µs
#1 of 7
2025-10-16
GEMM n4096 k4096fp16 · [224, 4096]
NVIDIA B200
17.0µs
#1 of 8
2025-10-16
GEMM n4096 k4096fp16 · [4, 4096]
NVIDIA B200
17.2µs
#1 of 8
2025-10-16
GEMM n4096 k4096fp16 · [2, 4096]
NVIDIA B200
17.3µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [256, 4096]
NVIDIA B200
17.9µs
#1 of 9
2025-10-16
GEMM n4096 k4096fp16 · [240, 4096]
NVIDIA B200
18.0µs
#1 of 8
2025-10-16
GEMM n4096 k4096fp16 · [232, 4096]
NVIDIA B200
18.0µs
#1 of 8
2025-10-16
GEMM n4096 k4096fp16 · [248, 4096]
NVIDIA B200
18.0µs
#1 of 7
2025-10-16
GEMM n4096 k4096fp16 · [8, 4096]
NVIDIA B200
18.0µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [7, 4096]
NVIDIA B200
18.3µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [1, 4096]
NVIDIA B200
18.8µs
#2 of 8
2025-10-16
GEMM n4096 k4096fp16 · [200, 4096]
NVIDIA B200
19.0µs
#1 of 7
2025-10-16
GEMM n4096 k4096fp16 · [972, 4096]
NVIDIA B200
32.0µs
#2 of 7
2025-10-16
GEMM n4096 k4096fp16 · [2053, 4096]
NVIDIA B200
49.6µs
#2 of 7
2025-10-16
GEMM n4096 k4096fp16 · [2379, 4096]
NVIDIA B200
63.1µs
#2 of 7
2025-10-16
GEMM n4096 k4096fp16 · [8192, 4096]
NVIDIA B200
192.2µs
#1 of 8
2025-10-16

Reproduction-ready · How evidence levels are derived →

Source and license

sourcehttps://huggingface.co/datasets/flashinfer-ai/flashinfer-trace
commitda915083d4c7c5e61aa3005e3d17ae488e0fc71c
revision digestsha256:91d266168500a8f2ad29339dd5d0e53da6d0e3255ce656bc7359b821c84b4698
license declaredApache-2.0
license concludedApache-2.0
authorsgemini-2.5-pro
imported2026-08-20

Kernel source

main.cpp86 lines
#include <torch/extension.h>
#include <c10/cuda/CUDAStream.h>

#include "kernel.h"

#include <stdexcept>
#include <string>

// Helper macros for concise tensor validation
#define CHECK_CUDA(x) TORCH_CHECK(x.is_cuda(), #x " must be a CUDA tensor")
#define CHECK_CONTIGUOUS(x) TORCH_CHECK(x.is_contiguous(), #x " must be contiguous")
#define CHECK_HALF(x) TORCH_CHECK(x.scalar_type() == torch::kFloat16, #x " must be a float16 tensor")

/**
 * @brief PyTorch extension entry point for the GEMM operation.
 *
 * This function validates input tensors and calls the CUDA kernel launcher
 * to perform the computation C = A * B.T on the GPU.
 *
 * @param A A torch::Tensor of shape [M, 4096] and dtype float16.
 * @param B A torch::Tensor of shape [4096, 4096] and dtype float16.
 * @return A torch::Tensor C of shape [M, 4096] and dtype float16 containing the result.
 */
torch::Tensor run(torch::Tensor A, torch::Tensor B) {
    // --- Input Validation ---
    CHECK_CUDA(A);
    CHECK_CUDA(B);
    CHECK_CONTIGUOUS(A);
    CHECK_CONTIGUOUS(B);
    CHECK_HALF(A);
    CHECK_HALF(B);

    TORCH_CHECK(A.dim() == 2, "A must be a 2D tensor");
    TORCH_CHECK(B.dim() == 2, "B must be a 2D tensor");

    // --- Dimension Checks ---
    const int M = A.size(0);
    const int K_A = A.size(1);
    const int N_B = B.size(0);
    const int K_B = B.size(1);

    const int N_spec = 4096;
    const int K_spec = 4096;

    TORCH_CHECK(K_A == K_spec, "A must have shape [M, 4096], but K is ", K_A);
    TORCH_CHECK(N_B == N_spec, "B must have shape [4096, 4096], but N is ", N_B);
    TORCH_CHECK(K_B == K_spec, "B must have shape [4096, 4096], but K is ", K_B);
    TORCH_CHECK(A.device() == B.device(), "Tensors must be on the same CUDA device");

    // --- Output Tensor Allocation ---
    auto C_options = torch::TensorOptions()
        .device(A.device())
        .dtype(A.scalar_type());
    auto C = torch::empty({M, N_spec}, C_options);

    // --- Kernel Execution ---
    try {
        // Get the current CUDA stream from PyTorch's context to ensure proper synchronization
        cudaStream_t stream = at::cuda::getCurrentCUDAStream();

        // Get raw data pointers. at::Half is compatible with cuda_fp16.h::half
        const half* A_ptr = reinterpret_cast<const half*>(A.data_ptr<at::Half>());
        const half* B_ptr = reinterpret_cast<const half*>(B.data_ptr<at::Half>());
        half* C_ptr = reinterpret_cast<half*>(C.data_ptr<at::Half>());

        // Launch the cuBLAS-based kernel
        gemm_n4096_k4096_launcher(M, A_ptr, B_ptr, C_ptr, stream);

    } catch (const std::exception& e) {
        // Propagate exceptions from the CUDA/cuBLAS calls to Python
        throw std::runtime_error(std::string("CUDA kernel execution failed: ") + e.what());
    }

    // Check for any asynchronous errors from the kernel launch. This is good practice.
    cudaError_t err = cudaGetLastError();
    if (err != cudaSuccess) {
        throw std::runtime_error(std::string("CUDA asynchronous error: ") + cudaGetErrorString(err));
    }

    return C;
}

// Pybind11 module definition to expose the 'run' function to Python
PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
    m.def("run", &run, "GEMM (A * B.T) for N=4096, K=4096 using a B200-optimized cuBLAS kernel");
}
scrolls · 86 lines total

Source code from FlashInfer-Bench (flashinfer-ai/flashinfer-trace) · Apache-2.0

Best evidence level for this revision: reproducible

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